Embedded Circuit Board Surface Roughness Control

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Solution Overview

Problem

The smooth surface finish from CMP processing in semiconductor circuit boards can lead to reduced solder adhesion and reliability due to the uniform surface roughness of wiring and pad sections, affecting component mountability and signal transmission stability.

Innovation Solution

A circuit board design where the surface roughness of the conductor in the wiring section is kept small and the pad section has a greater roughness, achieved by embedding the conductor in a circuit recess with varying surface roughness, enhancing solder adhesion and signal stability while preventing resin flow issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If CMP processing is used to form embedded circuits, then the surface of the insulating base substrate and circuit surface are planarized, but the surface roughness of the conductor in the pad section becomes too smooth, reducing solder adhesion and reliability

Engineering Contradiction:
Improvesurface planarityVSAvoidsolder adhesion
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies different surface roughness treatments to different sections of the conductor: the pad section is given greater surface roughness to enhance solder adhesion, while the wiring section maintains smaller surface roughness to stabilize signal transmission. This local differentiation resolves the contradiction by optimizing each section for its specific function rather than applying uniform CMP processing throughout.

Inventive Principle:
Principle #3Local quality

2Reliability

If the surface roughness of the conductor in the pad section is increased to improve solder adhesion, then component mountability is improved, but the flowability of resin sealant for packaging is reduced

Engineering Contradiction:
Improvesolder adhesionVSAvoidresin flowability reduction
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent confines the increased surface roughness treatment specifically to the pad section where solder adhesion is critical, while keeping the wiring section smooth. This localized approach ensures that the resin sealant encounters minimal roughness during flow paths through the wiring sections, maintaining its flowability and preventing packaging defects, while still achieving enhanced solder adhesion at the pad sections.

Inventive Principle:
Principle #3Local quality

3Speed

If uniform surface roughness is maintained across all conductor sections, then signal transmission speed is stabilized, but solder adhesion at the pad section is reduced

Engineering Contradiction:
Improvesignal transmission speedVSAvoidsolder adhesion
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent creates a differentiated surface roughness profile where the wiring section maintains small surface roughness to ensure stable signal transmission speed, while the pad section has greater surface roughness to maximize solder adhesion. This spatial variation in surface properties allows both requirements to be satisfied simultaneously in their respective locations.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9332642B2Circuit board
Publication Date: 2016.05.03 PANASONIC HOLDINGS CORP
  • US9332642B2 patent drawing
  • US9332642B2 patent drawing
  • US9332642B2 patent drawing

AI summary

One aspect of the present invention relates to a circuit board including an insulating base substrate; and a circuit layer that is formed of a conductor and that is provided on the surface of the insulating base substrate, wherein the insulating base substrate has a smooth surface having a surface roughness Ra of 0.5 μm or less, and the conductor is at least partially embedded in a wiring groove formed in the surface of the insulating base substrate.