Embedded Conductive Layer for Fo-WLCSP Interconnects

Solution Overview

Problem

The existing manufacturing processes for semiconductor devices, particularly in Fo-WLCSP, are costly due to the additional processing steps required for forming conductive vias for vertical electrical interconnects, which increases the complexity and expense of the manufacturing process.

Innovation Solution

A method is developed to form a conductive layer over a metal substrate within cavities and outside them, allowing for both vertical and horizontal electrical interconnects by embedding the conductive layer within an insulating layer and forming an interconnect structure over an encapsulant, which is then connected to the semiconductor die, thereby reducing the need for additional processing steps and costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conductive vias are formed through the encapsulant for vertical electrical interconnect, then electrical connectivity is achieved, but manufacturing complexity and cost increase due to additional processing steps

Engineering Contradiction:

Improveelectrical connectivityVSAvoidmanufacturing process complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The conductive layer is formed on the substrate before the encapsulant is applied. This preliminary formation of conductive pathways eliminates the need for subsequent via formation through the encapsulant, reducing manufacturing steps while maintaining electrical connectivity functionality

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The conductive pathways are extracted from the encapsulant material itself and placed as a separate conductive layer on the substrate. This separation allows the encapsulant to remain simple and eliminates the complex via formation process, as conductivity is provided by the pre-formed layer

Inventive Principle:

Principle #2Taking out (Extraction)

2Reliability

If conductive vias are formed through the encapsulant for vertical electrical interconnect, then electrical connectivity is achieved, but manufacturing cost increases due to additional processing steps

Engineering Contradiction:

Improveelectrical connectivityVSAvoidmanufacturing cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The conductive layer is formed on the substrate before the encapsulant is applied. This preliminary formation of conductive pathways eliminates the need for subsequent via formation through the encapsulant, reducing manufacturing steps while maintaining electrical connectivity functionality

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The conductive layer formation is merged with the substrate preparation process rather than being a separate subsequent step. This integration of steps reduces overall manufacturing complexity and cost while achieving the required electrical connectivity

Inventive Principle:

Principle #5Merging (Combining)

3Adaptability or versatility

If a conductive layer is formed over the substrate before encapsulation, then vertical and horizontal interconnects are enabled, but the substrate must be removed to expose the conductive layer

Engineering Contradiction:

Improveinterconnect capabilityVSAvoidprocess steps

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The conductive layer is formed on the substrate before the encapsulant is applied. This preliminary formation of conductive pathways eliminates the need for subsequent via formation through the encapsulant, reducing manufacturing steps while maintaining electrical connectivity functionality

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The substrate serves as an intermediary carrier that enables conductive layer formation, then is removed to expose the conductive layer for final interconnection. This intermediary approach allows complex conductive patterns to be formed easily on the substrate and then transferred to the final device structure

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS8901755B2Semiconductor device and method of forming conductive layer over metal substrate for electrical interconnect of semiconductor die

Publication Date: 2014.12.02 JCET SEMICON (SHAOXING) CO LTD

AI summary

A semiconductor device has a substrate with a cavity. A conductive layer is formed within the cavity and over the substrate outside the cavity. A plurality of indentations can be formed in a surface of the substrate opposite the cavity for stress relief. A first semiconductor die is mounted within the cavity. A plurality of conductive vias can be formed through the first semiconductor die. An insulating layer is disposed between the first semiconductor die and substrate with the first conductive layer embedded within the first insulating layer. An encapsulant is deposited over the first semiconductor die and substrate. An interconnect structure is formed over the encapsulant. The interconnect structure is electrically connected to the first semiconductor die and first conductive layer. The substrate is removed to expose the first conductive layer. A second semiconductor die is mounted to the conductive layer over the first semiconductor die.