Embedded Control Circuit Dual Bus Peripheral Access
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Solution Overview
Problem
Existing electronic devices lack an effective method for the host processor and embedded controller processor to efficiently, conveniently, and reliably access peripherals.
Innovation Solution
An embedded control circuit with a bus interface circuit for communication between the host processor and processor, utilizing dual buses to enable separate and simultaneous access to peripheral modules by the host processor and processor, allowing independent operations without interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single bus is used for peripheral access by both host processor and embedded controller processor, then device complexity is reduced, but bus bandwidth and access speed deteriorate due to access conflicts
Solution Approach 1:
The patent divides the peripheral access path into two separate buses: a first bus connecting the host processor to peripheral modules, and a second bus connecting the embedded controller processor to peripheral modules. This segmentation eliminates access conflicts and allows simultaneous independent access by both processors, resolving the contradiction between structural simplicity and access performance.
2Ease of operation
If shared bus access is used by host processor and embedded controller processor, then ease of operation is maintained, but reliability deteriorates due to access interference
Solution Approach 1:
By providing separate first and second buses for host processor and embedded controller processor respectively, the patent eliminates access interference while maintaining independent access capabilities. Each processor has its own dedicated bus path to peripheral modules, ensuring reliable simultaneous operation without mutual interference.
3Productivity
If dual buses are implemented for independent peripheral access, then bus bandwidth and access speed improve, but device complexity increases
Solution Approach 1:
The patent implements two separate buses (first bus for host processor, second bus for embedded controller processor) that are structurally simple and straightforward to implement. Each bus provides a direct access path from its respective processor to peripheral modules, achieving high bandwidth and speed without complex routing or arbitration logic.
4Device complexity
If single bus access is used, then device complexity is reduced, but reliability worsens due to access conflicts between processors
Solution Approach 1:
The patent resolves the reliability issue by segmenting the access paths into two independent buses. The first bus handles host processor access while the second bus handles embedded controller processor access, completely eliminating access conflicts and ensuring reliable simultaneous operation of both processors with peripheral modules.
Data Source
AI summary
An embedded control circuit includes: a bus interface circuit for communicating with a host processor; a processor; one or more peripheral modules; a circuit system connected to the bus interface circuit; a first bus connected between the one or more peripheral modules and the circuit system; and a second bus connected between the one or more peripheral modules and the processor. The circuit system is configured to communicate with the host processor through the bus interface circuit and access the one or more peripheral modules via the first bus according to the command from the host processor, and the processor is configured to access the one or more peripheral modules via the second bus.