Embedded Cooling Channels for Backside Power Rail ICs
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Solution Overview
Problem
The backside power rail (BPR) architecture in integrated circuits (ICs) faces challenges in effectively dissipating heat due to increased thermal resistance between heat-generating transistors and thermal solutions, as signal connection layers composed of dielectric materials with lower thermal conductivity separate them from heat sinks.
Innovation Solution
An embedded cooling structure is introduced, utilizing a second semiconductor substrate with fluidic channels coupled to the signal layers, which is bonded to the first semiconductor substrate containing transistors, allowing for enhanced heat dissipation through a cooling fluid separated by signal layers and a thin second substrate, reducing thermal resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If backside power rail architecture is used to increase transistor density, then transistor density is improved, but thermal resistance between transistors and heat sink increases
Solution Approach 1:
The patent divides the cooling system into two separate substrates: the first substrate contains the transistors and signal layers, while the second substrate contains the fluidic channels. This segmentation allows the cooling function to be integrated without interfering with the high-density transistor layout, as each substrate is optimized for its specific function while together they resolve the thermal resistance problem.
2Ease of manufacture
If signal connection layers are placed between transistors and heat sink to enable backside power rail architecture, then circuit routing is improved, but heat dissipation capability deteriorates
Solution Approach 1:
The patent introduces a second substrate as an intermediary component between the signal layers and the cooling fluid. This intermediary substrate with integrated fluidic channels acts as a thermal bridge, allowing heat to be conducted from the signal layers through the substrate to the cooling fluid, thereby maintaining effective heat dissipation despite the presence of signal connection layers.
3Device complexity
If conventional heat removal approaches are used, then device complexity is kept simple, but heat dissipation effectiveness is insufficient
Solution Approach 1:
The patent merges the structural support function with the heat dissipation function by integrating fluidic channels directly into the second substrate. This combination eliminates the need for separate cooling components, achieving effective heat dissipation while maintaining relatively simple device complexity through functional integration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design significantly improves heat removal from BPR ICs, maintaining performance by minimizing thermal resistance and facilitating manufacturing with structural support from the additional substrate.
Implementation Method 1
The signal connection layers are primarily composed of dielectric materials that have lower thermal conductivity than semiconductor materials such as silicon (Si). As a result, in the BPR architecture, there is more thermal resistance between the heat-generating transistors and the thermal solution
Implementation Method 2
a second semiconductor substrate, coupled to the region of signal layers, wherein a first side of the second semiconductor substrate is coupled to the region of signal layers, and a second side of the second semiconductor substrate includes a plurality of fluidic channels
Data Source
AI summary
According to various embodiments, a packaged integrated circuit device includes: a first semiconductor substrate and a second semiconductor substrate. The first semiconductor substrate includes: an integrated circuit, a region of signal layers residing on a first side of the first semiconductor substrate, and a region of power delivery layers residing on a second side of the first semiconductor substrate. The second semiconductor substrate is coupled to the region of signal layers, wherein a first side of the second semiconductor substrate is coupled to the region of signal layers, and a second side of the second semiconductor substrate includes a plurality of fluidic channels.