Embedded Core Substrates for 3D Memory Bandwidth Scaling
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Solution Overview
Problem
Multi-die or multi-chiplet computing systems face memory deficiencies and bottlenecks, particularly in high-performance computing applications, due to limitations in vertical stacking of components using traditional core substrates and redistribution layer interposers.
Innovation Solution
The implementation of core substrates with embedded components, allowing for both mounting of components on the side and embedding within the substrate, which includes active components like HBM and passive components such as trench capacitors, transistors, and liquid cooling channels, enhancing memory and processing resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional core substrates and redistribution layer interposers are used for vertical stacking of components, then component mounting is enabled, but memory capacity and bandwidth are limited due to bottlenecks in the stacking architecture
Solution Approach 1:
The patent transitions from traditional 2D packaging to true 3D stacking by embedding components within the core substrate itself rather than merely mounting them on the surface. This dimensional change enables vertical integration of memory and logic components through the substrate thickness, dramatically increasing memory capacity and bandwidth by utilizing the third dimension (depth) for component placement and interconnection.
Solution Approach 2:
The patent embeds memory components and logic components nested within the core substrate, similar to nested dolls. The core substrate contains embedded components that are integrated within its structure, allowing multiple functional layers to be stacked vertically through the substrate. This nesting approach enables high-density integration and eliminates the bottlenecks of traditional surface-mount architectures.
2Quantity of substance
If more memory components are added to increase capacity, then memory bandwidth improves, but resource bottlenecks and design complexity increase in co-packaged devices
Solution Approach 1:
The core substrate is designed as a universal platform that can simultaneously host multiple types of components (memory components, logic components, passive components) in embedded configurations. This multi-functional substrate provides a standardized interface and integration architecture that simplifies design customization while enabling flexible configuration of different component combinations to meet various memory capacity and performance requirements.
3Ease of manufacture
If traditional surface mounting of components is used, then manufacturing is simpler, but vertical stacking and memory integration are insufficient for high-performance computing
Solution Approach 1:
The patent incorporates memory components and logic components into the core substrate during the substrate manufacturing process itself, before the final assembly stage. This preliminary embedding action allows components to be integrated within the substrate structure during fabrication, enabling true 3D stacking capability while maintaining manufacturing efficiency through standardized substrate production processes that can be scaled.
Data Source
AI summary
An interposer device includes a core substrate, at least one embedded component formed within the core substrate, and at least one redistribution layer (RDL) on at least one of a first surface of the core substrate or a second surface of the core substrate opposite the first surface.