Substrate-Embedded Decoupling Capacitor for Smaller IC Packages
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Solution Overview
Problem
Existing semiconductor packages face challenges due to the space and placement limitations imposed by surface-mounted decoupling capacitors, which increase package size and reduce the effectiveness of voltage regulation for integrated circuits.
Innovation Solution
Integrating electrodes for capacitors within the substrate, forming via stacks that extend between layers to create electrodes separated by dielectric material, allowing for a decoupling capacitor that does not occupy surface space and can be placed closer to the integrated circuit, thus reducing package size and improving voltage stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If surface-mounted decoupling capacitors are used, then voltage regulation for integrated circuits is provided, but package size increases and placement flexibility is reduced
Solution Approach 1:
The patent merges the decoupling capacitor with the substrate by integrating capacitor electrodes directly into the substrate structure. The first and second electrodes are formed within the substrate layers, eliminating the need for separate surface-mounted capacitor components while maintaining voltage regulation functionality.
Solution Approach 2:
The capacitor electrodes are nested within the substrate structure. The first electrode is formed in a first layer of the substrate and the second electrode is formed in a second layer of the substrate, with dielectric material between them, creating a nested configuration that saves surface space.
2Reliability
If surface-mounted decoupling capacitors are used, then voltage regulation is provided, but placement options are limited
Solution Approach 1:
By combining the capacitor functionality with the substrate structure itself, the invention removes the constraint of fixed surface mounting locations. The capacitor electrodes can be positioned at any location within the substrate layers where electrical connection is needed, providing versatile placement options.
3Area of stationary object
If decoupling capacitors are placed farther from integrated circuits, then surface space is available for other components, but charge transfer time increases
Solution Approach 1:
The capacitor electrodes are nested within the substrate layers in close proximity to the integrated circuit. The first electrode in the first layer and the second electrode in the second layer can be positioned immediately adjacent to the integrated circuit pads, enabling fast charge transfer while maintaining surface area availability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces semiconductor package size, enhances placement flexibility, and improves the effectiveness of capacitors by shortening charge transfer times, while maintaining voltage stability for integrated circuits.
Implementation Method 1
dielectric material separating every via stack included in the first plurality of via stacks from every via stack included in the second plurality of via stacks
Data Source
AI summary
Implementations described herein relate to various apparatuses and integrated assemblies. In some implementations, an apparatus may include a substrate having a first surface and a second surface that is on an opposite side of the substrate with respect to the first surface. The apparatus may include an integrated circuit disposed on the substrate. The apparatus may include a decoupling capacitor configured to stabilize an input voltage supplied to the integrated circuit, wherein all electrodes of the decoupling capacitor are entirely within a region between the first surface and the second surface.