Embedded Diode Array for Phase Change Memory Voltage Drop Reduction
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Solution Overview
Problem
Conventional phase change memory structures face issues such as stacked memory cell collapse, high voltage requirements due to Schottky contacts, and manufacturing throughput and performance challenges related to epitaxial growth and silicon ion implantation processes.
Innovation Solution
The integration of diodes embedded within the semiconductor substrate, with doped semiconductor regions of opposite conductivity types, and the formation of phase change elements over these diodes, utilizing shallow and insulating regions to reduce voltage drop and enhance manufacturing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If stacked memory cell structures are used to increase density, then storage capacity is improved, but the memory cell stacks are prone to collapse after patterning
Solution Approach 1:
The patent forms sacrificial mandrels and spacers before patterning the memory cell stacks. These sacrificial structures are created in advance to provide mechanical support during the stacking process, preventing collapse. After the stacks are formed, the sacrificial mandrels are removed, leaving the desired memory cell structure.
2Device complexity
If Schottky contacts are used in conventional phase change memory, then device simplicity is maintained, but high voltage requirements result from voltage drop
Solution Approach 1:
The patent introduces an intermediate n+ doped region between the metal contact and the phase change material. This intermediate layer acts as a mediator that reduces the contact resistance and voltage drop at the interface, allowing operation at lower voltages while maintaining device simplicity.
3Ease of manufacture
If epitaxial growth is used to form diodes after peripheral MOS devices, then manufacturing sequence is simplified, but high epitaxy temperature degrades MOS device performance
Solution Approach 1:
The patent inverts the conventional manufacturing sequence by forming the diode structures before the peripheral MOS devices. This allows the diodes to be formed at high temperature without affecting the MOS devices, which are subsequently formed at lower temperatures to preserve their performance.
Solution Approach 2:
The diode structures are formed in advance using high-temperature epitaxial growth before the peripheral MOS devices are fabricated. This preliminary action allows the use of optimal high-temperature processing for the diodes without compromising the thermal budget available for the sensitive MOS device formation.
4Ease of manufacture
If high dosage and high energy silicon ion implantation is used to form diodes, then diode formation is achieved, but peripheral MOS device performance is adversely affected
Solution Approach 1:
The patent inverts the manufacturing sequence by forming diodes through ion implantation before creating peripheral MOS devices. This allows high dosage and high energy ion implantation to be used for diode formation without damaging the MOS devices, which are subsequently formed using gentler processing conditions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces degradation to peripheral MOS devices, eliminates the need for epitaxial growth, and minimizes voltage drop, resulting in a scalable and efficient phase change memory structure with improved manufacturing throughput and performance.
Implementation Method 1
The diode includes a first doped semiconductor region of a first conductivity type, wherein the first doped semiconductor region is embedded in the semiconductor substrate; and a second doped semiconductor region over and adjoining the first doped semiconductor region, wherein the second doped semiconductor region is of a second conductivity type opposite the first conductivity type
Implementation Method 2
The chalcogenide semiconductors, also called phase change materials, have a crystalline state and an amorphous state. In the crystalline state, the phase change materials have a low resistivity, while in the amorphous state they have a high resistivity
Implementation Method 3
The integration of diodes embedded within the semiconductor substrate, with doped semiconductor regions of opposite conductivity types, and the formation of phase change elements over these diodes, utilizing shallow and insulating regions to reduce voltage drop
Data Source
AI summary
An integrated circuit structure includes a semiconductor substrate; a diode; and a phase change element over and electrically connected to the diode. The diode includes a first doped semiconductor region of a first conductivity type, wherein the first doped semiconductor region is embedded in the semiconductor substrate; and a second doped semiconductor region over and adjoining the first doped semiconductor region, wherein the second doped semiconductor region is of a second conductivity type opposite the first conductivity type.