Embedded ECC in FPGA Configuration Memory Using Don't Care Bits
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Solution Overview
Problem
Integrated circuits face challenges in detecting and correcting memory bit corruption caused by single event upsets (SEUs) due to ions or electromagnetic radiation, with existing error detection techniques either requiring significant hardware resources or taking too long to detect and correct errors.
Innovation Solution
A computer-aided design (CAD) tool is used to process configuration data on programmable integrated circuits, identifying don't care bits and computing parity bits to detect and correct errors efficiently with minimal additional hardware resources, by implementing a two-dimensional parity check code and error code generation using don't care memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional error detection techniques are used, then error detection capability is improved, but hardware resources increase significantly
Solution Approach 1:
The configuration memory cells serve dual purposes: storing configuration data and storing error detection/correction codes. The don't care bits within the configuration memory are repurposed to hold parity bits and Hamming codes, eliminating the need for separate dedicated error correction memory resources.
Solution Approach 2:
The configuration memory cells are made multi-functional by enabling them to simultaneously store configuration data and error correction codes. The don't care bits, which originally served no functional purpose, are transformed into useful storage locations for parity and Hamming codes.
2Reliability
If comprehensive error correction codes are implemented, then error correction capability is improved, but overhead increases
Solution Approach 1:
Error correction codes are extracted and embedded within the existing configuration memory structure by utilizing don't care bits. This approach removes the need for separate overhead memory resources while maintaining comprehensive error correction capability through parity bits and Hamming codes.
3Reliability
If existing error detection methods are used, then error detection is achieved, but correction time is too long
Solution Approach 1:
Parity bits and Hamming codes are pre-computed and stored in the configuration memory during the configuration phase. When errors occur, the pre-stored codes enable immediate error detection and correction without requiring time-consuming computation during operation.
Data Source
AI summary
A computer-aided design (CAD) tool may identify don't care bits in configuration data. The don't care bits in the configuration data may change polarity without affecting the functionality of the circuit design. The CAD tool may compute an error check code (e.g., parity bits for a two-dimensional parity check) and insert the error check code into the configuration data. As an example, the CAD tool may replace don't care bits in the configuration data with the error code. The configuration data may be stored in configuration memory cells on a programmable integrated circuit, thereby implementing the circuit design with the error code on the programmable integrated circuit. During execution, the programmable integrated circuit may execute error checking and detect and correct errors in the configuration data based on the embedded error code.