Embedded Epitaxial Fin Structure for Leakage-Controlled Nanosheet Channels

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Solution Overview

Problem

The challenge of forming reliable semiconductor devices at smaller sizes is exacerbated by the complexity of fabrication processes as feature sizes continue to decrease, making it difficult to achieve efficient and reliable manufacturing.

Innovation Solution

A semiconductor device structure is developed with a stack of channel structures, source/drain epitaxial structures, and isolation structures, incorporating embedded epitaxial structures adjacent to semiconductor fins to enhance performance and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If feature sizes continue to decrease to increase functional density, then production efficiency improves and costs decrease, but fabrication process complexity increases and manufacturing reliability deteriorates

Engineering Contradiction:
Improveproduction efficiencyVSAvoidmanufacturing reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The device is segmented into distinct functional regions including suspended channel structures separated by dielectric material, with source and drain regions independently formed. This segmentation allows each region to be optimized independently for manufacturing reliability while maintaining overall device density and functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from planar device architecture to three-dimensional suspended channel structures. The channel is suspended above the substrate with dielectric material underneath, creating vertical separation that improves manufacturing control and reliability while maintaining small footprint for high functional density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If conventional fabrication processes are used for scaled devices, then manufacturing simplicity is maintained, but device performance and reliability deteriorate

Engineering Contradiction:
Improvefabrication simplicityVSAvoiddevice reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

Dielectric material is deposited and patterned beforehand to define the suspension region before channel formation. This preliminary structuring simplifies subsequent fabrication steps while ensuring precise control over channel positioning and device reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

A dielectric material layer is introduced as an intermediary between the substrate and suspended channel structures. This intermediary layer provides mechanical support, electrical isolation, and stress control, enabling reliable fabrication of scaled devices without requiring complex direct-substrate processing.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution improves manufacturing efficiency and reduces the risk of current leakage while maintaining device performance by utilizing epitaxial structures that apply stress to channel structures and enhance current flow.

Implementation Method 1

utilizing epitaxial structures that apply stress to channel structures and enhance current flow

Methodology Applied
Scientific EffectStress:

Data Source

PatentUS12382660B2Structure and formation method of semiconductor device with embedded epitaxial structure
Publication Date: 2025.08.05 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12382660B2 patent drawing
  • US12382660B2 patent drawing
  • US12382660B2 patent drawing

AI summary

A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes a stack of channel structures over a semiconductor fin and a gate stack wrapped around the channel structures. The semiconductor device structure also includes a source/drain epitaxial structure adjacent to the channel structures and an isolation structure surrounding the semiconductor fin. A protruding portion of the semiconductor fin protrudes from a top surface of the isolation structure. The semiconductor device structure further includes an embedded epitaxial structure adjacent to a first side surface of the protruding portion of the semiconductor fin.