Embedded IC Packaging with Wire-in-Film Adhesive

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Solution Overview

Problem

Current integrated circuit packaging technologies face challenges in achieving smaller footprints, reduced production costs, and improved reliability while managing increasing complexity and environmental factors such as EMI radiation, thermal loads, and high-frequency data transmission.

Innovation Solution

The integration circuit packaging system positions the integrated circuit below the substrate's top surface, utilizing a wire-in-film adhesive for protection and thermal management, and incorporates multiple chips with optimized interconnects to reduce package size and interconnection length, thereby minimizing material usage and parasitic inductance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the integrated circuit is positioned on the substrate surface with traditional packaging, then the assembly is straightforward, but the package footprint is larger and interconnection length is increased

Engineering Contradiction:
Improvepackage footprintVSAvoidassembly complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The integrated circuit die is positioned within a recess or cavity formed in the substrate, effectively nesting the die within the substrate structure. This nesting approach reduces the overall package footprint by utilizing the substrate's vertical space rather than extending the die laterally on the substrate surface, while the substrate itself serves as the packaging structure that protects and supports the die.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The invention transitions from a traditional planar arrangement where the die sits on the substrate surface to a three-dimensional configuration where the die is embedded within the substrate's depth. This dimensional change allows for shorter interconnection lengths and reduced package footprint while maintaining electrical connectivity through vertical vias or conductive structures within the substrate.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If traditional wire bonding is used with longer wire sweeps, then the assembly process is simpler, but parasitic inductance increases and reliability decreases

Engineering Contradiction:
Improveassembly reliabilityVSAvoidinterconnection complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention extracts or removes the traditional wire bonding process from the assembly methodology. By positioning the die within the substrate and utilizing direct conductive connections through the substrate material itself, the need for separate wire bonding steps is eliminated, thereby reducing parasitic inductance associated with long wire sweeps while maintaining assembly reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The substrate serves as an intermediary structure that provides direct electrical pathways between the die and external connections. Instead of using long wire sweeps as intermediaries, the substrate's internal conductive structures (such as embedded traces or vias) act as the intermediary, providing shorter, lower-inductance connection paths that improve reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Object-affected harmful factors

If more material is used for protection and packaging, then environmental protection is improved, but manufacturing cost increases

Engineering Contradiction:
Improveenvironmental protectionVSAvoidmanufacturing cost
Core Design Contradiction:
Object-affected harmful factorsVSEase of manufacture

Solution Approach 1:

The substrate is designed to perform multiple functions simultaneously: it serves as the mechanical support structure, the electrical interconnection medium, and the protective packaging enclosure. This multi-functionality eliminates the need for separate protective housing materials, reducing overall material usage and manufacturing cost while maintaining environmental protection through the substrate's inherent protective properties.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The invention merges the protective packaging function with the substrate structure itself. Instead of adding separate protective materials around the die, the substrate is designed to encapsulate and protect the die within its recessed structure, combining the protection function with the existing substrate material and reducing the need for additional protective materials.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in reduced package size, lower manufacturing costs, enhanced thermal cooling, and improved reliability by minimizing wire sweeps and parasitic inductance, while maintaining effective protection against environmental factors.

Implementation Method 1

utilizing a wire-in-film adhesive for protection and thermal management

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

minimizing material usage and parasitic inductance

Methodology Applied
Scientific EffectParasitic inductance: Inductor

Data Source

PatentUS8476111B2Integrated circuit packaging system with intra substrate die and method of manufacture thereof
Publication Date: 2013.07.02 STATS CHIPPAC MANAGEMENT PTE LTD
  • US8476111B2 patent drawing
  • US8476111B2 patent drawing
  • US8476111B2 patent drawing

AI summary

A method of manufacture of an integrated circuit packaging system includes: providing a substrate having a through hole; mounting an integrated circuit in the through hole, the integrated circuit having an inactive side and a vertical side; connecting a first interconnect in direct contact with the integrated circuit and the substrate; applying a wire-in-film adhesive around and above the integrated circuit leaving a portion of the vertical side and the inactive side exposed and covering a portion of the first interconnect; and mounting a chip above the integrated circuit and in direct contact with the wire-in-film adhesive.