Embedded Metal Pad Layout for IR Drop in Stacked Semiconductor Dies
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Solution Overview
Problem
Stacked semiconductor devices experience increased resistance and voltage drop (IR drop) due to limited critical dimensions in power routing, leading to reduced performance, timing delays, and increased power consumption, which are exacerbated by the need for additional circuitry to support increased photodiode density and readout functions.
Innovation Solution
Incorporating a metal pad embedded within the semiconductor substrate to provide an additional current path with reduced resistance, mitigating IR drop by allowing for parallel conductive pathways that bypass the limitations of conventional metal wire dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional metal wire routing is used for power distribution, then the device footprint is reduced and manufacturing is simplified, but resistance increases and voltage drop worsens
Solution Approach 1:
The patent transitions from conventional two-dimensional metal wire routing to a three-dimensional embedded metal pad structure. The metal pad is embedded within the semiconductor substrate, creating additional conductive pathways that extend in multiple dimensions, thereby reducing resistance and voltage drop without increasing the device footprint.
Solution Approach 2:
The metal pad is nested within the semiconductor substrate, with the conductive material embedded inside the substrate volume. This nesting approach allows the power distribution network to utilize the substrate's internal space, reducing resistance without occupying additional external space or complicating the overall device structure.
2Loss of energy
If metal wire dimensions are reduced to increase interconnect density, then area is reduced, but resistance increases and voltage drop worsens
Solution Approach 1:
The embedded metal pad creates conductive pathways that extend vertically and laterally within the substrate, utilizing three-dimensional space. This allows for reduced device footprint while maintaining low resistance through multiple conductive paths that are not constrained by planar wire routing limitations.
3Adaptability or versatility
If additional circuitry is added to support increased photodiode density, then functionality is improved, but resistance increases and voltage drop worsens
Solution Approach 1:
The metal pad structure is nested within the substrate to provide additional current paths that support higher photodiode density. The embedded configuration allows circuitry to be added for increased functionality while the metal pad simultaneously provides low-resistance power distribution to accommodate the additional circuitry without exacerbating voltage drop.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The metal pad reduces voltage drop and maintains or improves interconnect density, enhancing the performance and functionality of stacked semiconductor devices by providing efficient power distribution without increasing manufacturing costs.
Implementation Method 1
Incorporating a metal pad embedded within the semiconductor substrate to provide an additional current path with reduced resistance, mitigating IR drop
Data Source
AI summary
A stacked semiconductor device comprising a first die including a first semiconductor substrate and a first interconnect, a second die including a second semiconductor substrate and a second interconnect, a plurality of first bonding pads disposed within the first interconnect stack, a plurality of second bonding pads disposed within the second interconnect stack, and a metal pad embedded within the first semiconductor substrate is described. The plurality of first bonding pads contact the plurality of second bonding pads at a bonding interface to form a plurality of bonding connections. The metal pad is coupled to a first bonding connection included in the plurality of bonding connections. The metal pad extends laterally between a first pair of bonding connections included in the plurality of bonding connections when the stacked semiconductor device is viewed from a plan view.