Embedded PCB Pad Structure for Thermal Stress Resistance
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Solution Overview
Problem
The existing manufacturing process of embedded printed circuit boards faces challenges in achieving strong bonding between substrates and electronic components due to thermal stress, which can lead to breaking of bonding portions during the bonding process.
Innovation Solution
The embedded printed circuit board design incorporates pads with specific structural arrangements, such as outermost peripheral pads with a non-solder mask defined (NSMD) structure at corners and inner pads with a solder mask defined (SMD) structure, to enhance bonding strength, along with an encapsulating resin that covers the electronic component and substrate bonding members, and a thermal compression bonding method to secure the substrates while minimizing thermal expansion impact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the first substrate and second substrate are heated to a predetermined temperature for bonding, then the bonding between substrates is achieved, but thermal stress is applied to the bonding portion between the electronic component and the first substrate, causing the bonding portion to break
Solution Approach 1:
The patent applies different structural configurations to different regions of pads. Outermost peripheral pads at corner positions have a different structure (exposed pads without insulating layer coverage) compared to inner pads (covered by insulating layer). This local differentiation allows corner pads to better withstand thermal stress during substrate bonding while inner pads maintain electrical connection stability.
Solution Approach 2:
The patent segments the pads into two distinct groups: outermost peripheral pads and inner pads. This segmentation allows each group to be optimized for its specific functional requirements - outer pads for thermal stress resistance and inner pads for electrical connection stability - thereby resolving the contradiction between substrate bonding strength and component bonding reliability.
2Reliability
If all pads are exposed without protective insulating layer coverage, then thermal stress distribution is improved, but electrical insulation and protection are reduced
Solution Approach 1:
The patent applies the protective insulating layer selectively - covering inner pads while leaving outermost peripheral pads at corner positions exposed. This local quality approach provides electrical insulation where needed (inner pads) while maintaining thermal stress resistance where most critical (corner pads), thereby resolving the contradiction between thermal stress resistance and electrical insulation.
Solution Approach 2:
The patent segments the pad protection strategy into two zones: exposed outer pads for thermal management and protected inner pads for electrical insulation. This segmentation allows simultaneous achievement of thermal stress resistance and electrical insulation by assigning different protective characteristics to different spatial regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the bonding reliability between the substrate and the semiconductor chip by distributing thermal stress effectively and maintaining strong connections, reducing the likelihood of bonding portion failure and enhancing overall bonding strength.
Implementation Method 1
a thermal stress is applied to a bonding portion between the electronic component and the first substrate, and the bonding portion may break due to the thermal stress
Implementation Method 2
the first substrate and the second substrate are heated to a predetermined temperature
Data Source
AI summary
An embedded PCB includes a first substrate, an electronic component mounted on the first substrate, a second substrate provided on a side opposite to the first substrate with the electronic component interposed therebetween, and electrically connected to the first substrate via substrate bonding members, and an encapsulating resin filled between the first and second substrates, covering the electronic component, and also filled between the electronic component and the first substrate. The first substrate includes, on a side closer to the electronic component, pads to be bonded to electrodes of the electronic component via bonding portions, and a protective insulating layer including openings. The pads include outermost peripheral pads in an outermost periphery including four corners of an approximately rectangular area in a plan view, and inner pads in an area surrounded by the outermost peripheral pads.


