Embedded PCB Traces via Laser Ablation
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Solution Overview
Problem
In printed circuit board (PCB) fabrication, voids can be entrapped between traces during prepreg lamination, and signal integrity and conductor impedance are difficult to control due to varying dielectric spacing, leading to fabrication issues and reliability problems, especially when trace widths and spaces are less than one mil.
Innovation Solution
Embedding PCB traces within a laminate substrate using a catalytic base laminate with palladium powder and resin-rich prepregs, and forming channels through laser ablation or plasma etching to ensure precise geometry and adhesion, followed by electroless copper plating and planarization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If PCB traces are formed above a laminate surface using conventional photolithography and chemical copper etching, then the fabrication process is simple and straightforward, but the trace geometry varies across the length of traces leading to poor signal propagation and trace impedance control
Solution Approach 1:
Channels are ablated into the laminate substrate before copper plating to pre-establish the exact trace geometry. This preliminary channel formation ensures that the copper traces will follow precise paths with controlled dimensions, eliminating the geometry variations that occur with conventional surface-level photolithography and chemical etching methods
Solution Approach 2:
The conventional mechanical and chemical process (photolithography masks and chemical etching) is replaced with laser ablation or plasma etching to create channels. This substitution provides more precise control over trace geometry since the ablation process can accurately define channel dimensions and paths before copper deposition
2Reliability
If PCB traces are formed above a laminate surface, then the fabrication process is easier, but voids can be entrapped between traces during prepreg lamination or solder mask application
Solution Approach 1:
Instead of forming traces only on the surface plane, the invention embeds traces within channels that extend into the laminate substrate. This transition from two-dimensional surface traces to three-dimensional embedded traces eliminates void formation during lamination since the traces are contained within the substrate volume rather than protruding above the surface
Solution Approach 2:
The copper traces are nested within the ablated channels in the laminate substrate. This nesting approach ensures that traces are enclosed within the substrate structure, preventing void entrapment during subsequent lamination or solder mask application processes while maintaining electrical functionality
3Manufacturing precision
If trace widths and spaces are less than one mil, then higher density circuitry is achieved, but adhesion failures occur causing poor yields and reliability issues
Solution Approach 1:
Channels are ablated into the laminate substrate before copper plating to pre-establish the exact trace geometry. This preliminary channel formation ensures that the copper traces will follow precise paths with controlled dimensions, eliminating the geometry variations that occur with conventional surface-level photolithography and chemical etching methods
Solution Approach 2:
Instead of forming traces only on the surface plane, the invention embeds traces within channels that extend into the laminate substrate. This transition from two-dimensional surface traces to three-dimensional embedded traces eliminates void formation during lamination since the traces are contained within the substrate volume rather than protruding above the surface
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method provides controlled trace geometry and improved adhesion, enhancing electrical performance and reliability by ensuring consistent impedance and reducing fabrication failures.
Implementation Method 1
forming channels through laser ablation or plasma etching
Implementation Method 2
followed by electroless copper plating and planarization
Implementation Method 3
catalytic base laminate with palladium powder
Data Source
AI summary
A printed circuit board includes a laminate substrate. The laminate substrate includes catalytic material that resists metal plating except where a surface of the catalytic material is ablated. Metal traces are formed within in trace channels within the laminate substrate. The channels extend below the surface of the catalytic material.


