Embedded RF Inductor Base Using Copper Seed Layers

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Solution Overview

Problem

Conventional radio-frequency (RF) devices have limited inductor thickness and area consumption, resulting in low quality factor (Q-factor) and inability to reduce the size of the RF main die and number of die-per-wafer, making them unsuitable for high-speed applications.

Innovation Solution

A semiconductor package with RF devices embedded in the base, utilizing conductive seed layers and a laminating process to form RF devices and conductive traces, allowing for increased thickness and reduced size, and using copper instead of aluminum to improve performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional on-wafer inductors are formed of aluminum with limited thickness, then fabrication processes are simple, but the quality factor is low and area consumption is high

Engineering Contradiction:
Improvequality factorVSAvoidarea consumption
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The patent changes the material parameter from aluminum to copper, and the geometric parameter from thin to thick (up to 10 times thicker), which simultaneously improves the quality factor and reduces the area required for the inductor to achieve the same inductance value

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent transitions from planar 2D inductor structures to 3D vertical structures by stacking multiple conductive layers, enabling the inductor to extend in the vertical dimension while reducing the horizontal area footprint

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If conventional RF devices use discrete chips and components, then device functionality is achieved, but the RF main die size cannot be reduced and number of die-per-wafer is limited

Engineering Contradiction:
Improvenumber of die-per-waferVSAvoidRF main die size
Core Design Contradiction:
ProductivityVSLength of stationary object

Solution Approach 1:

The patent merges multiple discrete RF components (inductors, capacitors, antennas, filters, power amplifiers) into a single integrated RF device structure, eliminating the need for separate chips and interconnections, which reduces the overall die size and enables higher die-per-wafer counts

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent creates a universal RF device platform where a single die can perform multiple RF functions through different configurations of the integrated structures, reducing the need for multiple specialized dies

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If conventional inductors are formed with limited thickness, then fabrication is straightforward, but performance in high-speed applications is insufficient

Engineering Contradiction:
Improveperformance in high-speed applicationsVSAvoidinductor thickness control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent forms thick conductive layers and complex 3D structures before final device assembly, using preliminary stacking and bonding steps that enable subsequent precise patterning and connection operations

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent divides the thick inductor structure into multiple discrete conductive layers that can be independently fabricated and precisely controlled, then stacked and bonded together to achieve the final thick structure with controlled precision

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables higher quality factor RF devices with increased thickness and reduced size, improving performance and efficiency in high-speed applications by embedding RF devices in the base and using copper for improved conductivity.

Implementation Method 1

providing a carrier with conductive seed layers on the top surface and the bottom surface of the carrier. Radio-frequency (RF) devices are respectively formed on the conductive seed layers

Methodology Applied
Scientific EffectElectroplating: Electroplating

Implementation Method 2

A first base material layer and a second base material layer are respectively laminated on the conductive seed layers, covering the RF devices

Methodology Applied
Scientific EffectLamination: Lamination

Data Source

PatentUS10916449B2Semiconductor package and method for fabricating base for semiconductor package
Publication Date: 2021.02.09 MEDIATEK INC
  • US10916449B2 patent drawing
  • US10916449B2 patent drawing
  • US10916449B2 patent drawing

AI summary

The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a base. The base has a device-attach surface. A radio-frequency (RF) device is embedded in the base. The RF device is close to the device-attach surface.