Embedded Schottky Diode ESD Protection in LDMOS Devices
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Solution Overview
Problem
Lateral Diffusion MOS transistors (LDMOS) in smart power applications face electrostatic discharge (ESD) issues due to high currents and electric fields, which can destroy the surface junction region, and increasing the surface or lateral rules to improve ESD protection is limited by electrical requirements.
Innovation Solution
The integration of embedded Schottky diodes in ESD Bipolar Junction transistors within the BICOMS-DMOS process to enhance ESD protection, reducing reverse recovery time and improving the turned-on speed of LDMOS/DMOS devices during ESD events.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the surface or lateral rules of LDMOS device are increased to improve ESD protection performance, then the ESD protection capability is improved, but the on-state resistance increases which violates electrical requirements
Solution Approach 1:
The invention divides the ESD protection function into separate embedded Schottky diode structures within the BJT device, rather than relying on increased surface area of the LDMOS device. This segmentation allows ESD protection to be achieved through dedicated protection elements without increasing the LDMOS device dimensions that would increase on-state resistance.
Solution Approach 2:
The embedded Schottky diodes act as intermediary protection elements between the LDMOS device and ESD events. These diodes provide a preferential path for ESD currents, protecting the LDMOS device without requiring changes to its structure that would increase on-state resistance.
2Speed
If embedded Schottky diodes are integrated in ESD BJT device, then the reverse recovery time is reduced and turned-on speed is improved, but the device structure complexity increases
Solution Approach 1:
The invention merges the Schottky diode structure with the BJT device structure, creating an integrated embedded Schottky BJT. This combination achieves fast switching performance while utilizing shared structural elements and fabrication processes, thereby limiting the increase in overall device complexity.
Solution Approach 2:
The embedded Schottky BJT structure serves multiple functions: it provides ESD protection, achieves fast reverse recovery, and maintains compatibility with standard BCD fabrication processes. This multi-functionality reduces the need for separate dedicated structures, thereby limiting complexity increase.
3Reliability
If embedded Schottky diodes are integrated in ESD BJT device, then ESD protection performance is enhanced without increasing the number of layers, but the manufacturing process complexity increases
Solution Approach 1:
The invention utilizes parameter changes in the fabrication process, such as adjusting doping concentrations and well depths, to integrate the Schottky diode structure within the existing BJT fabrication flow. This approach enhances ESD protection without requiring additional fabrication layers or fundamentally changing the manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the risk of device damage and internal circuit failure by lowering switching power loss and enhancing ESD protection without the need to increase the number of layers in the standard BCD process, thereby improving the overall ESD performance of LDMOS/DMOS transistors.
Implementation Method 1
a first Schottky barrier and a second Schottky barrier. The first Schottky barrier is formed and overlaid on a part of the first base region and a part of the first doped region. The second Schottky barrier is formed and overlaid on a part of the second base region and a part of the second doped region
Data Source
AI summary
A semiconductor structure is proposed. A third well is formed between a first well and a second well. A first doped region and a second doped region are formed in a surface of the third well. A third doped region is formed between the first doped region and the second doped region. A fourth doped region is formed in a surface of the first well. A fifth doped region is formed in a surface of the second well. A first base region and a second base region are respectively formed in surfaces of the first well and the second well. A first Schottky barrier is overlaid on a part of the first base region and the first doped region. A second Schottky barrier is overlaid on a part of the second base region and the second doped region.