Embedded Stack Package Reducing Wire Length Variability
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Solution Overview
Problem
The manufacturing of slim stack packages is hindered by increased volume occupied by substrates, and the variability in conductive wire lengths between semiconductor chips leads to decreased operational speed in stacked packages.
Innovation Solution
An embedded type stack package is developed, where semiconductor chips are attached to a cover film with adhesive members and circuit patterns, and vias are formed to electrically connect the chips, eliminating the need for printed circuit boards and reducing connection path lengths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conductive wires are used to electrically connect semiconductor chips in stacked packages, then electrical connection is achieved, but the variability in wire lengths causes decreased operational speed
Solution Approach 1:
The patent extracts and eliminates the conductive wires from the electrical connection system. Instead of using wires to connect semiconductor chips in stacked packages, the invention directly bonds the chips to each other through the adhesive member, removing the intermediate connection element that caused length variability and speed degradation.
Solution Approach 2:
The patent merges the adhesive member with the circuit board function. The adhesive member that bonds semiconductor chips to the package substrate is configured to include circuit patterns, thereby combining the mechanical bonding function and the electrical connection function into a single integrated component, eliminating the need for separate wire connections.
2Strength
If substrates are provided to package units in stack packages, then structural support is achieved, but the volume occupied by substrates increases, preventing slim package design
Solution Approach 1:
The patent merges the substrate and adhesive member into a single integrated component. The adhesive member that provides mechanical bonding between semiconductor chips is configured to include circuit patterns, thereby eliminating the need for a separate substrate and reducing the overall package volume while maintaining both structural support and electrical connection functions.
Solution Approach 2:
The adhesive member is designed to perform multiple functions simultaneously: mechanical bonding of semiconductor chips, electrical connection through integrated circuit patterns, and structural support as a package substrate. This multi-functionality eliminates the need for separate components and enables slim package design.
3Ease of manufacture
If conventional wire bonding process is used for electrical connection, then manufacturing process is established, but manufacturing costs increase and data processing speed decreases
Solution Approach 1:
The patent extracts and eliminates the wire bonding process from the manufacturing sequence. Instead of performing separate wire bonding operations to connect chips electrically, the invention directly bonds chips to the adhesive member that already contains circuit patterns, eliminating the wire bonding step and reducing manufacturing complexity and cost.
Data Source
AI summary
A stack package includes a cover film, a first package having a first semiconductor chip which is attached to the cover film, a first adhesive member which is formed to seal the first semiconductor chip and a surface of the cover film, and a first circuit pattern which is disposed over the first adhesive member and electrically connected with the first semiconductor chip; a second package disposed over the first package, having a second semiconductor chip which is electrically connected with the first circuit pattern, a second adhesive member which is formed to seal the second semiconductor chip, and a second circuit pattern which is formed over the second adhesive member, and a via formed to pass through the second circuit pattern and the second adhesive member and to be electrically connected with the first circuit pattern and the second circuit pattern.