Power Semiconductor Module with Embedded Stacked Chips
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional power semiconductor modules face challenges in minimizing stray inductance, especially with fast switching wide band-gap semiconductors, which is difficult to achieve with traditional designs due to inductive loops and requires complex and costly manufacturing processes.
Innovation Solution
Embedding power semiconductor chips in a printed circuit board (PCB) and stacking them vertically, with connection terminals positioned above, while using multi-layer PCBs to form short interconnections and optimize gate-emitter loops for balanced current flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional power semiconductor module design is used, then manufacturing is simpler and cost-effective, but stray inductances cannot be minimized below 10 nH due to inductive loops in commutation paths
Solution Approach 1:
The patent transitions from planar module design to three-dimensional stacked architecture, where semiconductor chips are vertically stacked and interconnected through PCB vias. This dimensional change reduces the area of inductive loops by routing current paths vertically through multiple layers, achieving stray inductance below 10 nH while maintaining manufacturing feasibility through standardized PCB and chip stacking processes
Solution Approach 2:
The patent embeds semiconductor chips within PCB structures, nesting multiple functional layers including copper traces, vias, and insulating layers within the PCB volume. This nesting approach integrates interconnection paths directly within the PCB structure, minimizing external loop areas and reducing stray inductance without significantly increasing overall module complexity
2Manufacturing precision
If 3D stacked module design is used, then stray inductances are reduced, but manufacturing becomes complicated and less cost-effective
Solution Approach 1:
The patent employs standardized PCB structures that serve multiple functions: providing mechanical support, electrical interconnection through traces and vias, and integration platform for stacked chips. This multi-functionality leverages existing PCB manufacturing capabilities, avoiding the need for specialized equipment or processes, thereby maintaining cost-effectiveness while achieving 3D stacked architecture with reduced stray inductance
Solution Approach 2:
The patent divides the power semiconductor module into discrete, independently manufacturable components including separate PCB layers, individual semiconductor chips, and modular interconnection structures. This segmentation allows each component to be manufactured using standard processes and then assembled through conventional bonding and wiring techniques, reducing overall manufacturing complexity despite the 3D stacked configuration
3Ease of manufacture
If PCB technology is used for embedding semiconductors, then manufacturing cost and yield improve, but traditionally it is constrained to low-voltage and low-power implementations
Solution Approach 1:
The patent uses composite PCB structures combining copper traces, ceramic or polymer substrates, and insulating layers to achieve both high-power handling capability and manufacturing efficiency. The composite material structure provides high voltage breakdown strength and current carrying capacity while maintaining compatibility with standard PCB fabrication processes, enabling high-power implementations with improved manufacturing cost and yield
Data Source
Figure 1a~2
Figure 3a~3e
Figure 4~5
AI summary
The present disclosure describes a power electronics module comprising a lead frame in which a chip of a first semiconductor device is embedded, a first PCB mounted on top of the lead frame and the chip of the first semiconductor device, and a support frame mounted on top of the PCB, the support frame comprising a cavity in which the chip of a second semiconductor device is embedded, wherein the chips of the first semiconductor device and the second semiconductor device are positioned on top of each other, and the first PCB comprises a first electrically conducting path between the chips of the first semiconductor device and the second semiconductor device.