Embedded Stacked Die Packages with Heat Dissipation
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Solution Overview
Problem
Current semiconductor package technologies face challenges in efficiently forming stacked embedded die packages without sequential build-up laminate substrates, bondwires, and electrically conductive clips, while ensuring effective electrical coupling and heat dissipation.
Innovation Solution
The method involves coupling semiconductor dies with electrically conductive elements, forming redistribution layers, and encapsulating them in mold compounds using compression molding, with the removal of substrate portions and application of solder masks to create a stacked embedded package that includes heat dissipation devices exposed on the outer surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional sequential build-up laminate substrates, bondwires, and electrically conductive clips are used, then electrical coupling between dies is achieved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent removes traditional bondwires, electrically conductive clips, and sequential build-up laminate substrates from the package structure. Electrical coupling is achieved directly through conductive pillars formed between dies during the molding process, eliminating unnecessary intermediate components and simplifying the overall device architecture.
Solution Approach 2:
The patent combines the electrical coupling function and mechanical support function into a single integrated structure. Conductive pillars serve both as electrical interconnects between dies and as structural elements embedded in the mold compound, merging multiple functions into one component system.
2Productivity
If multiple dies are stacked with traditional methods, then electrical functionality is achieved, but manufacturing precision and alignment difficulty worsen
Solution Approach 1:
The patent performs preliminary positioning of conductive pillars within the mold compound before die attachment. The pillars are pre-formed with precise locations and orientations, establishing alignment references that guide subsequent die placement and ensure accurate electrical connections without requiring complex real-time alignment procedures.
Solution Approach 2:
The mold compound serves as an intermediary material that simultaneously provides mechanical support, electrical insulation, and precise positioning for conductive pillars and dies. This intermediary medium facilitates accurate alignment by embedding conductive elements in predetermined locations and maintaining spatial relationships during the stacking process.
3Temperature
If heat dissipation devices are integrated into stacked packages, then thermal management is improved, but device complexity increases
Solution Approach 1:
The patent integrates heat dissipation devices that serve multiple functions: thermal management through heat conduction, structural support as mechanical elements, and electrical isolation as insulating components. This multi-functionality approach adds thermal management capability without proportionally increasing device complexity, as the same structural elements perform multiple roles.
Solution Approach 2:
The heat dissipation device is nested within the stacked die package structure, with thermal management components integrated between and around the semiconductor dies. The heat spreader and thermal interface materials are positioned within the existing package footprint, nesting thermal management functions within the conventional package architecture rather than adding external components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of compact, efficient semiconductor packages with enhanced electrical coupling and heat dissipation capabilities without the need for sequential build-up laminate substrates or bondwires, facilitating integration with PCBs or as standalone packages.
Implementation Method 1
at least partially encapsulating the first semiconductor die and the plurality of electrically conductive elements in a mold compound to form a first mold layer
Data Source
AI summary
Forming a semiconductor package includes coupling electrically conductive elements with a substrate, coupling a first die with one or more of the electrically conductive elements, and at least partially encapsulating the first die and electrically conductive elements in a first mold layer. A first redistribution layer (RDL) is placed over the first mold layer and electrically coupled with the first die. A second die is coupled with the first RDL, and the second die and first RDL are at least partially encapsulated in a second mold layer. A second RDL is formed over the second mold layer and is electrically coupled with the second die. A third mold layer at least partially encapsulates the second RDL. A portion of the substrate is removed to expose (and a solder mask is applied to) surfaces of the electrically conductive elements and of the first mold layer to form a stacked embedded package.


