Embedded Carrying Substrate for Dense Package Routing and Heat Dissipation
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Solution Overview
Problem
The existing semiconductor package structures face challenges with heat dissipation due to low thermal conductivity of encapsulants and high manufacturing costs and low yield, especially for large-size packages with high-density circuits.
Innovation Solution
A carrying substrate with a first circuit structure, circuit components, and an encapsulation layer that embeds the components, allowing for increased routing area and reduced routing layers, which enhances heat dissipation and manufacturing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If a heat sink is bonded to the semiconductor chip via TIM layer, then heat dissipation is improved, but the manufacturing complexity and cost increase
Solution Approach 1:
The patent extracts the heat dissipation function from the traditional heat sink structure and integrates it directly into the package substrate through a heat dissipation layer. This eliminates the need for separate heat sink components and TIM layers, simplifying the manufacturing process while maintaining effective heat dissipation from the semiconductor chip.
Solution Approach 2:
The patent merges the heat dissipation function with the package substrate by forming a heat dissipation layer directly on the substrate. This integration combines multiple functions (substrate support and heat dissipation) into a single component, reducing the number of manufacturing steps and assembly operations required.
2Quantity of substance
If large-size package substrates are used for high-density circuits, then circuit density is improved, but manufacturing yield decreases and cost increases
Solution Approach 1:
The patent segments the package substrate into a carrier substrate and a device substrate, allowing independent manufacturing and optimization of each part. The carrier substrate can be manufactured with standard processes at higher yields, while the device substrate accommodates the high-density circuits. This segmentation enables larger overall package size without proportionally increasing manufacturing difficulty.
Solution Approach 2:
The patent utilizes the vertical dimension by stacking the carrier substrate and device substrate in different planes, and by forming heat dissipation structures in the thickness direction. This three-dimensional arrangement allows high circuit density without requiring excessively large lateral dimensions, thereby maintaining manufacturability and yield.
3Reliability
If the encapsulant material is used to encapsulate semiconductor chip, then chip protection is achieved, but heat dissipation capability is insufficient due to low thermal conductivity
Solution Approach 1:
The patent employs composite material structures, including a heat dissipation layer with high thermal conductivity materials (such as metal layers) integrated with the package substrate, and an encapsulant layer providing both protection and additional heat dissipation pathways. This composite approach combines the protective function of encapsulation with enhanced thermal management capabilities.
Solution Approach 2:
The patent makes the encapsulant layer multi-functional by selecting materials and designing structures that simultaneously provide mechanical protection, electrical insulation, and heat dissipation. The encapsulant is not merely a protective coating but also serves as an active thermal management component.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a high-yield, cost-effective semiconductor package with improved heat dissipation capabilities, suitable for large-size packages with high-density circuits, addressing the limitations of prior art.
Implementation Method 1
an encapsulation layer formed on the first side of the first circuit structure and encapsulating the circuit component
Data Source
AI summary
A method of manufacturing a carrying substrate is provided. At least one circuit component is disposed on a first circuit structure. An encapsulation layer is formed on the first circuit structure and encapsulates the circuit component. A second circuit structure is formed on the encapsulation layer and electrically connected to the circuit component. The circuit component is embedded in the encapsulation layer via an existing packaging process. Therefore, the routing area is increased, and a package substrate requiring a large size has a high yield and low manufacturing cost.