Embedded Substrate Multi-Layer Stopper Cavity Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing number of components on smartphone motherboards, particularly for 5G communications, requires miniaturization and modularization to accommodate additional components like antennas and baseband modems while maintaining compatibility with 4G LTE, necessitating a reduction in the package area and foot size of electronic components.
Innovation Solution
The use of a multi-stage stopper layer with different metal layers to control the inclination of cavity walls in an electronic component embedded substrate, allowing for a reduced foot size and package area by forming a cavity with non-orthogonal and differently inclined walls, and enabling modularization through surface-mounted components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a conventional single-layer stopper structure is used to form a cavity, then the manufacturing process is simple, but the cavity wall inclination cannot be controlled, resulting in larger foot size and package area
Solution Approach 1:
The stopper layer is divided into multiple metal layers (first metal layer and second metal layer) with different functions. The first metal layer forms the cavity wall with a specific inclination, while the second metal layer provides additional structural support and electrical connectivity. This segmentation allows independent optimization of each layer's properties to achieve the desired cavity geometry and reduce foot size.
Solution Approach 2:
The solution transitions from a single-layer (2D) stopper structure to a multi-layer (3D) structure with varying inclinations. By introducing vertical layering with different metal materials and inclination angles, the patent achieves precise control over cavity wall geometry, enabling reduced foot size while maintaining manufacturing feasibility.
2Length of stationary object
If the cavity wall inclination is controlled using multiple metal layers, then the foot size and package area are reduced, but the manufacturing complexity increases
Solution Approach 1:
The patent utilizes changes in material parameters (different metal materials with distinct etching rates) and geometric parameters (different inclination angles for each metal layer) to achieve precise cavity formation. By selecting metals with different etching characteristics, the process automatically generates the desired non-orthogonal wall inclinations during selective removal, simplifying the overall manufacturing control.
Solution Approach 2:
The stopper layer employs composite metal layering with different materials (e.g., copper and tungsten, or aluminum and copper) that have different etching rates and physical properties. This composite structure enables differential etching to create the complex cavity geometry, where each material layer contributes differently to the final shape, achieving precise foot size reduction through material property variation.
3Quantity of substance
If electronic components are densely packed on the motherboard, then more components can be mounted, but the available space for additional components like antennas and baseband modems is reduced
Solution Approach 1:
The patent embeds electronic components within cavities formed in the substrate, creating a nested structure where components are housed inside the substrate volume rather than occupying surface area. This nesting approach allows additional components to be integrated within the existing package footprint, increasing component density without expanding the overall device area.
Solution Approach 2:
The solution moves component placement from the 2D surface plane to the 3D volume by creating embedded cavities. By utilizing the vertical dimension and embedding components within the substrate thickness, the patent effectively increases the available mounting space without increasing the planar footprint, allowing more components to be integrated in the same package area.
Data Source
AI summary
An electronic component embedded substrate includes a core structure including a first insulating body and core wiring layers and having a cavity and a stopper layer. An electronic component is disposed in the cavity. The stopper layer includes a first metal layer embedded in the first insulating body and having a portion of an inner surface exposed from the first insulating body, and a second metal layer disposed below the first metal layer and having at least a portion of an upper surface disposed as a bottom surface of the cavity. The cavity has an inner surface of the first metal layer and an inner surface of the first insulating body as a first wall surface and a second wall surface, respectively, and an inclination of the first wall surface is different from an inclination of the second wall surface.