Embedded System Design for Programmable Logic Devices
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Solution Overview
Problem
Traditional complex processing systems implemented using software on microprocessors with dedicated hardware blocks face inefficiencies in communication between software and hardware components, lacking an automated design tool for mapping hardware/software systems onto programmable logic devices (PLDs) effectively.
Innovation Solution
A method and apparatus for efficient communication between processing elements and a processor in a PLD, utilizing lookup tables and control logic to manage instruction distribution and data transfer, along with an automated design tool for generating source code files that define configurable attributes of the base platform, enabling efficient hardware/software communication and system design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If traditional software-based processing systems are used, then system flexibility and ease of programming are improved, but processing speed and hardware utilization efficiency deteriorate
Solution Approach 1:
The patent merges software processing elements with hardware processing elements into a unified hybrid architecture. The processor executes software instructions while hardware processing elements perform specialized functions, combining the flexibility of software with the speed of hardware. This is achieved through the shared memory architecture where both software and hardware elements access common data structures, enabling efficient coordination and resource sharing.
Solution Approach 2:
The hardware processing elements are designed with universal interfaces that allow them to be dynamically assigned different functions through software configuration. The same hardware element can execute different algorithms or perform different data processing tasks by changing the software instructions loaded into it, providing multi-functionality without requiring dedicated hardware for each specific task.
2Productivity
If dedicated hardware blocks are added to improve processing speed, then productivity is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
Instead of creating entirely new dedicated hardware blocks, the patent uses copies of general-purpose processing elements that can be configured through software. Multiple instances of the same processing element type can be created and assigned different functions, reducing the need for unique hardware designs for each processing task while maintaining high processing capability.
Solution Approach 2:
The architecture allows dynamic changing of processing element parameters such as clock frequency, data width, and operational mode through software control. This enables the same hardware block to adapt its parameters for different processing requirements without physical reconfiguration, reducing hardware complexity while maintaining flexibility.
3Adaptability or versatility
If manual mapping of hardware/software systems onto PLD is performed, then design customization is improved, but design time and development complexity increase
Solution Approach 1:
The patent employs preliminary action through automated tools that pre-configure processing element assignments, memory mappings, and communication protocols before the actual design process. Templates and configuration files enable rapid setup of standard architectures, reducing the time required for custom design while allowing adaptation to specific requirements through parameter modification rather than reconfiguration.
Solution Approach 2:
The design process incorporates feedback mechanisms where the automated mapping tool continuously monitors design parameters and adjusts hardware/software resource allocation in real-time. This iterative feedback loop optimizes the mapping configuration based on performance metrics and resource constraints, enabling customized designs to be generated automatically without requiring manual trial-and-error adjustments.
4Productivity
If efficient communication between software and hardware is implemented, then system performance is improved, but communication overhead and control complexity increase
Solution Approach 1:
The patent introduces an intermediary software layer that mediates communication between the processor and hardware processing elements. This intermediary layer handles task scheduling, data buffer management, and coordination protocols, abstracting the complexity of direct hardware-access from the software developer. The intermediary enables efficient data transfer while managing communication overhead through optimized buffering and caching mechanisms.
Data Source
AI summary
Method and apparatus for designing an embedded system for a programmable logic device (PLD) is described. Parameters specific to the embedded system are obtained. Source code files that use the parameters to define configurable attributes of the base platform are generated. A software definition and a hardware definition are obtained. The software and hardware definitions each use an application programming interface (API) of the base platform to define communication between software and hardware of the embedded system. An implementation of the embedded system is automatically built for the PLD using the source code files, the software definition, and the hardware definition.