Embedded Tantalum Alignment Markers for Low-Roughness E-Beam Overlay
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Solution Overview
Problem
In semiconductor device manufacturing, maintaining accurate alignment between multiple layers using alignment markers is challenging due to misalignment issues at nano-scale levels, particularly with existing tungsten markers that have high line edge roughness and are susceptible to wet etching, affecting the precision and reliability of integrated circuits.
Innovation Solution
The use of tantalum alignment markers with line edge roughness of less than 2.5 nm, embedded in a substrate and patterned using fluorinated plasma and a hafnium oxide mask, which exhibit high selectivity and resistance to wet etching, allowing for precise alignment and strong adhesion to the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If tungsten alignment markers are used, then alignment markers can be formed, but line edge roughness is high and wet etching resistance is poor
Solution Approach 1:
The patent changes the material parameter from tungsten to tantalum, which fundamentally alters the etching characteristics. Tantalum exhibits significantly different chemical reactivity toward wet etchants compared to tungsten, providing superior etching resistance while maintaining the high atomic number contrast needed for precise alignment marker detection.
Solution Approach 2:
The alignment marker structure uses a composite approach by combining tantalum material with specific deposition and patterning processes. The marker is formed as a distinct material phase within the substrate, creating a composite structure that leverages tantalum's unique properties for both detection contrast and etching resistance.
2Measurement precision
If alignment markers are used for multi-level ebeam lithography, then layer alignment can be achieved, but line edge roughness affects alignment accuracy at nano-scale
Solution Approach 1:
By changing the material from tungsten to tantalum, the patent modifies the physical and chemical parameters that influence line edge formation. Tantalum's properties enable sharper, more defined edges during the patterning process, reducing line edge roughness and improving the precision of alignment measurements at the nano-scale.
3Manufacturing precision
If fluorinated plasma and hafnium oxide mask are used for patterning, then selectivity is improved, but process complexity increases
Solution Approach 1:
The patent changes the chemical composition parameters of the etching plasma by using fluorinated plasma. This chemical parameter change creates highly selective etching conditions where tantalum is etched at a different rate compared to the hafnium oxide mask and substrate, enabling precise patterning without requiring additional process steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the positional accuracy of transistors and other features in semiconductor devices by reducing line edge roughness and enhancing resistance to wet etching, resulting in improved alignment and stability during multi-level e-beam lithography, with alignment resolution of less than 5 nm.
Implementation Method 1
determining, utilizing a backscatter electron detector of an electron beam lithography tool, a location of an edge of the alignment marker based on an atomic number contrast between the alignment marker and the substrate
Implementation Method 2
determining, utilizing a backscatter electron detector of an electron beam lithography tool, a location of an edge of the alignment marker based on an atomic number contrast between the alignment marker and the substrate
Implementation Method 3
Patterning the deposited alignment marker material may include dry etching the deposited alignment marker material utilizing a fluorinated plasma and a mask
Implementation Method 4
E-beam lithography utilizes a focused beam of electrons to draw custom shapes and patterns on a surface of a material that is covered with an electron-sensitive resist
Data Source
AI summary
One or more embodiments of the present disclosure are directed toward improved methods of fabricating a semiconductor device utilizing multi-level electron beam lithography (e-beam lithography), an alignment marker for multi-level e-beam lithography, and a semiconductor device including the alignment marker. A method of fabricating a semiconductor device may include: forming an alignment marker in a substrate, the alignment marker including tantalum; determining, utilizing a backscatter electron detector of an electron beam lithography tool, a location of an edge of the alignment marker based on an atomic number contrast between the alignment marker and the substrate; and forming, utilizing the electron beam lithography tool, at least one transistor in the substrate based on the location of the edge of the alignment marker.


