Embedded Wiring Thin-Film Transistor Substrate for Display
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Solution Overview
Problem
Current methods for forming thin-film transistors on substrates face challenges such as increased parasitic capacitance, reduced resolution, and difficulty in securing space for holding capacitors, leading to issues like increased power consumption, flicker, and burn-in in display devices, particularly in high-precision displays with multi-layer substrates that are opaque and prone to moisture-related malfunctions.
Innovation Solution
A thin-film transistor forming substrate is designed with embedded wiring that connects the source, drain, and gate electrodes inside the substrate, allowing for high precision and flexibility, and includes a multi-layer substrate structure with laminated base members to secure forming spaces and maintain electronic components within the substrate, reducing parasitic capacitance and improving reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multi-layer wirings are used in TFT elements to achieve high precision, then manufacturing precision is improved, but parasitic capacitance increases leading to increased power consumption
Solution Approach 1:
The patent extracts the wiring structure from the traditional multi-layer configuration and reconfigures it into a specific pattern where wirings are arranged to minimize overlapping areas. By taking out the harmful parasitic capacitance effect through optimized wiring layout, the patent achieves high precision TFT elements with reduced power consumption.
2Ease of manufacture
If printing method is used for TFT patterning to simplify manufacturing, then ease of manufacture is improved, but resolution deteriorates compared to photo-etching
Solution Approach 1:
The patent changes the parameters of the printing method by optimizing droplet size, deposition density, and material composition to achieve fine line patterns. By adjusting these parameters, the printing method attains resolution comparable to photo-etching while maintaining its manufacturing simplicity and cost advantages.
3Reliability
If space is allocated for holding capacitors in low-resolution displays, then device functionality is improved, but in high-precision displays the space requirement conflicts with pixel density
Solution Approach 1:
The patent merges the holding capacitor structure with the TFT element structure by integrating capacitor electrodes into the same layer as the transistor electrodes. This combination allows holding capacitors to be formed within the pixel area without requiring additional space, enabling high-resolution displays to maintain capacitor functionality.
Solution Approach 2:
The patent utilizes the thickness dimension by forming holding capacitors as three-dimensional structures within the substrate layers. By transitioning from two-dimensional planar capacitors to three-dimensional stacked capacitors, the patent achieves sufficient capacitance values without increasing the footprint area, thus preserving pixel resolution.
4Manufacturing precision
If TFT elements are formed with high resolution to improve display quality, then image quality is improved, but parasitic capacitance and resistance increase leading to decreased rewriting speed
Solution Approach 1:
The patent changes the material parameters by using low-resistivity conductive materials and optimizing wiring cross-sectional area to reduce resistance. Simultaneously, the wiring layout is optimized to minimize capacitance. These parameter changes enable high-resolution displays to achieve fast rewriting speeds by reducing the RC time constant.
Data Source
AI summary
There is provided a thin-film transistor forming substrate in which at least one of a source electrode, a drain electrode, and a gate electrode, which are constituent elements of a thin film transistor, or a first electrode is included on a face of a substrate main body that is located on any one side in a thickness direction. An embedded wiring that is connected to one of the source electrode, the drain electrode, the gate electrode, and the first electrode is buried inside the substrate main body.