Emulating Legacy Bus Operations Over Bit-Serial SPI
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Solution Overview
Problem
Legacy bus systems, such as the LPC bus, are not suitable for modern low-power devices, and the SPI bus lacks the ability to distinguish between I/O and memory accesses, making it difficult to replace traditional EC or SIO microcontrollers with generic microcontrollers while maintaining compatibility with existing ACPI-defined software interfaces.
Innovation Solution
A method to emulate legacy bus operations over a bit-serial bus by trapping legacy bus operations and mapping them into SPI bus transactions with a command phase, address phase, and data phase, allowing generic microcontrollers to process x86 I/O transactions and maintain compatibility with existing BIOS and OS software.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the SPI bus is used to replace the LPC bus for connecting microcontrollers, then power consumption is reduced and device versatility is improved, but the ability to distinguish I/O access from memory access is lost
Solution Approach 1:
The patent introduces an intermediary translation layer that converts legacy bus operations into SPI bus transactions. The interface controller acts as a mediator between the host processor's legacy I/O instructions and the SPI bus, mapping I/O operations to specific SPI command sequences that include phase identifiers to distinguish them from memory accesses.
Solution Approach 2:
The patent changes the parameter representation of bus operations by encoding operation type (I/O vs. memory access) into the command phase parameters of SPI transactions. The command identifier in the SPI protocol is modified to include flags or codes that indicate whether the subsequent transaction is an I/O operation or a memory operation, allowing differentiation without dedicated hardware signals.
2Adaptability or versatility
If generic microcontrollers are used to replace specialized EC or SIO microcontrollers, then device selection flexibility is improved and cost is reduced, but compatibility with existing ACPI-defined software interfaces deteriorates
Solution Approach 1:
The patent creates a virtual copy of the legacy LPC bus interface through software emulation. The interface controller implements ACPI-defined I/O port mappings and command protocols that replicate the behavior of traditional EC or SIO devices, allowing generic microcontrollers to respond to ACPI software interfaces as if they were specialized devices, thereby maintaining compatibility without requiring proprietary hardware.
3Ease of manufacture
If legacy bus operations are emulated over a bit-serial bus, then system cost and power consumption are reduced, but the complexity of the interface controller increases
Solution Approach 1:
The patent segments the emulation functionality into distinct modular components within the interface controller: a command parser that interprets legacy bus operations, a transaction builder that constructs SPI command sequences, a phase manager that handles command/address/data phases, and an ACPI compatibility layer. This segmentation allows the complex emulation logic to be organized into manageable, reusable modules that can be implemented in hardware or firmware.
Data Source
AI summary
Legacy bus operations, such as x86 I/O instructions having an address space separate from memory address space, are supported in a system in which I/O devices are coupled to a microcontroller connected via an SPI bus or other bit-serial bus. Each legacy bus operation is recognized and trapped by an interface controller, such as a south-bridge controller, which maps the trapped legacy bus operation into a corresponding bit-serial bus transaction, and transacts this corresponding bit-serial bus transaction on the bit-serial bus. Existing software infrastructure using x86 I/O instructions can remain intact, with I/O transactions bound for the SPI bus.