Emulating Mainframe I/O Architecture via Device Managers

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Solution Overview

Problem

The high cost of developing and training for mainframe class processing environments discourages software developers, as existing emulation solutions are inadequate for fully emulating I/O architectures like z/Architecture, particularly for DASD, coupling, and networking functions.

Innovation Solution

The implementation of an emulator that facilitates I/O processing by emulating the z/Architecture on a native system, using multiple device managers and a communications adapter process to translate I/O messages from guest to native system formats, enabling efficient I/O processing and reducing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If mainframe systems are used for development and training, then processing capability and I/O architecture fidelity are improved, but cost of ownership increases significantly

Engineering Contradiction:
ImproveI/O architecture fidelityVSAvoidcost of ownership
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent creates a software-based copy of the mainframe I/O architecture that runs on standard hardware platforms. The emulator replicates z/Architecture I/O behaviors, device manager functionalities, and message processing sequences without requiring actual mainframe hardware, thereby providing faithful I/O architecture emulation at lower cost.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent replaces the physical mainframe hardware system with a software-based emulation system. The emulator software substitutes for the actual mainframe processor and I/O subsystems, translating guest I/O operations into native system operations, thereby eliminating the need for expensive mainframe hardware while preserving I/O processing capabilities.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Adaptability or versatility

If full I/O architecture emulation is implemented, then functionality for DASD, coupling, and networking is improved, but system complexity increases

Engineering Contradiction:
ImproveI/O functionalityVSAvoidemulation system complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent divides the emulation system into distinct functional modules: device managers for different I/O devices (DASD, coupling, networking), message queues for different I/O operations, and translation layers for different message formats. Each device manager handles specific I/O device types independently, allowing comprehensive I/O functionality while maintaining manageable system complexity through modular organization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a universal emulation framework that can handle multiple types of I/O devices and operations through a common architecture. The device managers and message queues are designed to work together in a unified manner, providing support for DASD, coupling, and networking functions through the same basic emulation mechanism, thereby reducing complexity compared to implementing separate systems for each I/O type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If message translation between guest and native formats is implemented, then I/O processing compatibility is improved, but processing overhead increases

Engineering Contradiction:
ImproveI/O compatibilityVSAvoidI/O processing speed
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent pre-establishes message queues and translation mappings between guest and native message formats during system initialization. The device managers are pre-configured with knowledge of the correspondence between different message formats, allowing translations to occur through direct lookup and transformation rather than complex real-time interpretation, thereby reducing processing overhead while maintaining compatibility.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8099274B2Facilitating input/output processing of one or more guest processing systems
Publication Date: 2012.01.17 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US8099274B2 patent drawing
  • US8099274B2 patent drawing
  • US8099274B2 patent drawing

AI summary

An article of manufacture, method and system are provided for facilitating input/output (I/O) processing of at least one guest processing system. The article of manufacture includes at least one computer-usable medium having computer-readable program code logic to facilitate the I/O processing of the at least one guest processing system. The computer-readable program code logic when executing performing the following: emulating on a native system an I/O architecture for the at least one guest processing system, the emulating including: providing multiple device managers for a plurality of I/O devices of the I/O architecture; providing at least one communications adapter process interfacing the multiple device managers to the at least one network driver process; and wherein the multiple device managers translate I/O messages in at least one guest processing system format to messages in native system format for processing by the at least one communications adapter process, thereby facilitating I/O processing.