Emulation Interface for FPGA Signal Control and Observability
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Solution Overview
Problem
Current FPGA verification systems lack sufficient control and observability of signals, particularly in highly-integrated SoC devices, leading to difficulties in isolating root cause errors due to limited access and sample capture depth, and are often vendor-specific and not customizable for various FPGA types.
Innovation Solution
A custom prototype board with multiple FPGAs and a verification module that provides timing and control information, along with an emulation interface capable of receiving and processing signal values, storing them, and transmitting processed information to a host workstation, allowing for improved debugging and verification across various FPGA devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If FPGA vendor-specific verification tools are used, then system execution time is improved, but control and observability of signals deteriorates
Solution Approach 1:
The patent introduces an emulation interface as an intermediary component between the host workstation and the FPGA-based prototype system. This emulation interface includes a controller that receives signal values from the FPGA, processes them, and provides enhanced control and observability capabilities. The intermediary enables detailed signal monitoring and debugging without compromising the hardware-based execution speed of the FPGA system.
2Reliability
If FPGA vendor-specific verification tools are used, then verification capabilities are improved, but adaptability to different FPGA types deteriorates
Solution Approach 1:
The emulation interface is designed with universal functionality to work with multiple FPGA vendor types and devices. The controller component can be configured to interface with different FPGA architectures through standardized protocols, allowing the same verification system to adapt to various FPGA types while maintaining reliable verification capabilities across different hardware platforms.
3Quantity of substance
If external logic analyzer is combined with FPGA vendor-specific tools, then signal access is improved, but sample capture depth and root cause isolation capability deteriorates
Solution Approach 1:
The patent merges the functionality of the external logic analyzer with the FPGA verification system through the emulation interface. The controller integrates signal capture and processing capabilities, combining the high-speed signal access of hardware analyzers with the processing power of software tools. This unified approach enables deep sample capture and precise root cause isolation by coordinating hardware signal acquisition with software-based analysis in a tightly integrated system.
Data Source
AI summary
A method for emulating a circuit design includes receiving, at an emulation interface, signal values associated with probed signals from a verification module of a custom prototype board which can be described by at least one board description file and can comprise at least one field programmable gate array for emulating the circuit design. The method can also include processing, the probed signal values associated with a portion of the circuit design being emulated, the emulation interface being capable of being configured to provide timing and control information to at least the verification module, and can comprise a controller and a memory device, with the controller being capable of being configured to receive the probed signal values. The method can further include storing the processed information and transmitting it to the host workstation.