Emulator Fault Support via Resource Mapping
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Solution Overview
Problem
Hardware emulators face inefficiencies due to faulty integrated circuits, which can lead to unacceptable emulation results and require time-consuming re-compilation, especially in complex SoC designs where system verification is critical.
Innovation Solution
An emulator system that diagnoses and maps faulty resources, allowing for transparent and automated defect identification and storage, enabling the compiler to avoid using defective resources during the design compilation process, either through a centralized database or local storage on each board, ensuring fault-free resource utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hardware emulation is used for system verification, then verification productivity and confidence are improved, but the presence of faulty integrated circuits can cause unacceptable emulation results requiring time-consuming re-compilation
Solution Approach 1:
The patent implements preliminary fault diagnosis and mapping of faulty resources before the compilation process. By identifying and recording faulty integrated circuits in advance, the system prevents re-compilation when faults are detected, thereby resolving the contradiction between ensuring reliable emulation results and avoiding time-consuming re-compilation cycles.
2Reliability
If complete design verification is performed on complex SoC designs, then design quality is improved, but verification time and resource consumption increase
Solution Approach 1:
The patent extracts and isolates faulty resources from the emulation system by creating a separate fault map that identifies problematic integrated circuits. This allows the verification process to continue using only healthy resources, maintaining design verification quality while reducing the time impact by preventing failures during verification rather than requiring complete re-verification.
3Device complexity
If faulty integrated circuits are used in the emulator, then device complexity is reduced, but emulation accuracy and reliability deteriorate
Solution Approach 1:
The patent introduces an intermediary fault diagnosis and mapping mechanism that sits between the physical hardware resources and the compilation/emulation process. This intermediary layer identifies faulty resources and prevents their use in emulation, allowing the system to maintain high emulation accuracy without requiring complete elimination of potentially faulty components from the physical emulator.
Data Source
AI summary
An emulator is disclosed that allows for diagnoses of failures or defects within the emulator. A map of faulty resources is generated to identify which resources should be avoided during compilation. Thus, in a transparent and automated manner, defects found during diagnostics are stored in a database of unusable emulator resources. A compiler has access to the database and compiles the design taking into account unusable resources. In another embodiment, the defects of an emulator board are stored on the emulator board itself. This allows each board to store its own maintenance information that can be used at the manufacturing site for changing defective chips. Defects stored on the board itself allow the defects to be obtained independent of a position of a board within the emulator to simplify identification of the faulty resource.