Encapsulated Stress Mitigation Layer for Power Electronic Assemblies
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Solution Overview
Problem
Power electronic devices face thermomechanical stresses due to coefficient of thermal expansion differences between semiconductor devices, bonding layers, and substrates, leading to potential damage from high operating temperatures, especially as they approach 200°C, and existing bond layers are brittle and susceptible to cracking.
Innovation Solution
An assembly with a stress mitigation layer of low melting temperature materials, such as indium or tin, encapsulated within a platinum layer, which transitions to a liquid form at elevated temperatures, reducing thermomechanical stresses by allowing flexibility and heat absorption, while being sealed and maintained by a higher melting temperature encapsulating layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If a high melting temperature bond layer is used to withstand elevated operating temperatures, then the bond layer can maintain structural integrity at high temperatures, but the bond layer becomes very hard and brittle and is susceptible to thermally induced stress damage
Solution Approach 1:
The patent uses a composite bonding structure consisting of a TLP bond layer (intermetallic compound) combined with a stress mitigation layer of low melting temperature material. The TLP bond layer provides high temperature structural integrity, while the stress mitigation layer absorbs thermally induced stresses through phase change, creating a composite system that overcomes the brittleness of the high melting temperature material alone.
Solution Approach 2:
The stress mitigation layer utilizes phase transition from solid to liquid at its melting point (below operating temperature) to absorb thermally induced stresses. This phase change allows the material to flow and accommodate differential thermal expansion between the semiconductor device and substrate, preventing stress concentration and cracking in the TLP bond layer.
2Power
If the operating temperature of power electronic devices is increased to improve performance, then device capability is enhanced, but thermomechanical stresses increase causing potential damage to the bonded assembly
Solution Approach 1:
The stress mitigation layer acts as an intermediary between the TLP bond layer and the semiconductor device/substrate interface. This intermediate layer with low melting temperature absorbs the thermomechanical stresses generated during high-power operation, protecting the brittle TLP bond layer from direct stress exposure while allowing the device to operate at elevated temperatures for improved performance.
3Strength
If a brittle bond layer is used to achieve strong bonding, then bonding strength is improved, but the bond layer is susceptible to cracking under thermal stress
Solution Approach 1:
The stress mitigation layer is positioned between the brittle TLP bond layer and the interface components to provide beforehand cushioning against thermally induced stresses. This protective layer absorbs and dissipates stress energy before it can reach the TLP bond layer, preventing crack initiation and propagation while maintaining the strong bonding provided by the TLP process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The stress mitigation layer effectively reduces thermomechanical stresses and extends the lifespan of power electronic assemblies by absorbing heat and allowing flexibility, thereby mitigating damage from thermal expansion and contraction, even at elevated temperatures.
Implementation Method 1
The stress mitigation layer is formed of a low melting temperature material and melts into a liquid form when the assembly operates at a temperature above the low melting temperature of the stress mitigation layer
Implementation Method 2
the encapsulating layer maintains the liquid form of the stress mitigation layer within the assembly
Data Source
AI summary
Encapsulated stress mitigation layers and assemblies having the same are disclosed. An assembly that includes a first substrate, a second substrate, an encapsulating layer disposed between the first and second substrates, and a stress mitigation layer disposed in the encapsulating layer such that the stress mitigation layer is encapsulated within the encapsulating layer. The stress mitigation layer has a lower melting temperature relative to a higher melting temperature of the encapsulating layer. The assembly includes an intermetallic compound layer disposed between the first substrate and the encapsulating layer such that the encapsulating layer is separated from the first substrate by the intermetallic compound layer. The stress mitigation layer melts into a liquid when the assembly operates at a temperature above the low melting temperature of the stress mitigation layer and the encapsulating layer maintains the liquid of the stress mitigation layer within the assembly.