Encoder Signal Sampling with Adaptive Clocking and Denoising
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Solution Overview
Problem
In industrial automation, especially in motor systems and industrial robots, absolute encoder signal sampling often results in sampling errors due to interference noise, leading to instability and reduced performance in motor movement control.
Innovation Solution
An encoder signal sampling method and device that generates a high-frequency clock signal based on the data frequency, samples the input signal using this clock, and performs denoising processing using a preset algorithm to filter out noise, ensuring accurate signal acquisition.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If single signal acquisition is performed with a logic chip according to a specific beat and a fixed communication clock edge, then the sampling process is simple, but sampling errors occur due to interference noise and asynchronous sampling
Solution Approach 1:
The patent transitions from static fixed-clock-edge sampling to dynamic adaptive sampling. The sampling clock edge is dynamically adjusted based on the actual encoder data output timing, allowing the sampling moment to adapt to varying operational conditions and eliminate asynchronous sampling errors while maintaining implementation simplicity.
Solution Approach 2:
The patent implements feedback by using the encoder's own data output signal to trigger the sampling process. The sampling clock edge is generated based on feedback from the encoder's data output timing, creating a self-synchronized sampling mechanism that automatically adapts to signal conditions and eliminates interference from fixed clock edges.
2Ease of operation
If fixed clock edge sampling is used, then the sampling timing is deterministic, but noise signals are mistakenly regarded as valid data causing CRC check failures
Solution Approach 1:
The patent performs preliminary action by preparing multiple candidate sampling clock edges in advance and selecting the appropriate one based on predicted signal conditions. This allows the system to proactively choose optimal sampling timing before noise interference occurs, maintaining deterministic control while improving signal validity and CRC check pass rates.
3Productivity
If asynchronous sampling is performed without synchronization, then the sampling process is fast, but sampling errors occur and real-time update of absolute encoder position information fails
Solution Approach 1:
The patent introduces an intermediary synchronization mechanism that mediates between the encoder output and the sampling process. This intermediary layer aligns the sampling clock edge with the actual data output timing, enabling fast sampling without asynchronous errors and ensuring accurate real-time position information updates.
Data Source
AI summary
Disclosed are an encoder signal sampling method and device. According to the method and device, a data frequency of the encoder is obtained, a clock frequency is determined according to the data frequency, a high-frequency clock signal is generated based on the clock frequency, an input signal of the encoder is sampled based on the high-frequency clock signal to obtain a sampled signal, and finally denoising processing is performed on the sampled signal based on a preset algorithm by a processer.