Adaptive Equalizer Feedback for Rapid Eye Opening Under ISI
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Solution Overview
Problem
Existing communication systems face challenges in effectively addressing inter-symbol interference (ISI) due to varying channel impulse responses, particularly in high-speed serial communication systems like Ethernet, where blind equalization algorithms often result in long convergence times and high power consumption.
Innovation Solution
The implementation of a blind-type equalization approach using an equalizer circuit that modifies frequency components based on an error signal, generated by an absolute value circuit, comparator, and sign detection circuit, facilitating rapid convergence and eye opening without requiring knowledge of signal statistics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If blind equalization algorithms are used to address varying channel impulse responses, then the equalizer can operate without knowing signal statistics, but convergence time becomes long
Solution Approach 1:
The patent implements a decision-directed equalization algorithm where the equalizer output is fed back through a slicer to generate error signals. The slicer compares the equalized signal with decision thresholds and generates error signals that drive the adaptive filter coefficients. This feedback mechanism enables rapid convergence by continuously correcting the equalizer based on actual output decisions, resolving the contradiction between operating without signal statistics and achieving fast convergence.
2Adaptability or versatility
If traditional blind equalization methods are implemented, then multilevel PAM issues can be addressed, but circuit area and power consumption increase
Solution Approach 1:
The patent replaces complex computational operations with simpler analog circuit operations. The adaptive filter uses analog multipliers and adders to implement the equalization function, avoiding the need for complex digital signal processing. The slicer-based error generation replaces sophisticated statistical analysis circuits. This substitution of mechanical/computational approaches with simpler circuit-based operations reduces power consumption while maintaining multilevel PAM handling capability.
Data Source
AI summary
Signal equalization is facilitated in a manner that provides for feedback operation with desirable equalization operation. As consistent with one or more embodiments, a sign is assigned to received signals by generating an output that is an absolute value of the received signals, and a comparator processes the output and to generate a signal having a voltage level limited to a predetermined value. A sign of a signal output by an equalizer is detected and used to assign a sign to the output of the comparator. A summation circuit sums the output of the equalizer with the output of the comparator, and provides the sum to the equalizer as an error signal. The equalizer modifies a frequency component of received signals based on the error signal.


