Error Injection for Built-In Self-Repair Memory Validation
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Solution Overview
Problem
Built-in self-repairable memory systems (BISRM) face challenges in validating redundant memory areas, as conventional methods cannot directly access spare columns for testing and validation, leading to unreliable results from simulation-based tests.
Innovation Solution
An error injection system is introduced that mimics faults in the BIST sequence, allowing direct access to spare columns for test write and read operations, ensuring the reliability of BISR logic and spare column validation by dynamically injecting faults and allocating redundant memory areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If simulation-based tests are used to validate spare columns, then testing can be performed without direct access, but the reliability of test results deteriorates
Solution Approach 1:
The patent introduces an error injection system as an intermediary mechanism that enables indirect access to spare columns during BIST. By injecting errors into main memory locations and observing the BISR allocation process, the system can validate spare columns without direct write access, thereby maintaining ease of operation while improving reliability of validation results
Solution Approach 2:
The patent creates a virtual test environment by copying the functional behavior of spare column access through error injection scenarios. Instead of directly accessing spare columns, the system copies the effect of spare column validation by observing how BISR responds to injected errors, providing reliable validation results through behavioral equivalence
2Reliability
If direct access to spare columns is enabled for testing, then test reliability improves, but device complexity increases
Solution Approach 1:
The error injection system serves multiple functions: it can inject errors into main memory locations, trigger BISR allocation processes, and validate both main memory and spare columns through a single unified mechanism. This multi-functionality improves validation reliability without proportionally increasing device complexity
Solution Approach 2:
The BISR system performs self-validation through the error injection process. When errors are injected into main memory locations, the BISR logic automatically triggers allocation processes that validate spare columns without requiring external test control, thereby improving reliability while minimizing additional complexity
3Measurement precision
If BISR logic is validated through error injection, then validation accuracy improves, but test time increases
Solution Approach 1:
The system performs preliminary error injection into main memory locations before actual spare column validation is needed. This preliminary action triggers the BISR allocation process in advance, allowing the system to validate multiple spare columns through a single error injection event rather than requiring separate validation operations for each column, thereby improving accuracy while reducing overall test time
Data Source
AI summary
An error injection system of a built-in self-repairable memory system renders the redundant spare columns of the repairable memory accessible to built-in self-test (BIST) read and write operations. To this end, the error injection system selectively injects fault data at one or more locations of the main memory during a BIST sequence, causing the BIST controller to issue a repair instruction that allocates one or more spare columns as replacement memory areas for the presumed faulty main memory locations. Thereafter, BIST read/write operations directed to the main memory locations will be performed on the allocated spare columns, thereby allowing the spare columns to be validated as part of the BIST. Injection of fault data to the main memory locations in this manner can also facilitate validation of the built-in self-repair logic by verifying the repair instruction codes that are generated in response to the injected faults.