ESD Analysis Device for Multi-Power Semiconductor Border Cells
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Solution Overview
Problem
Existing ESD analysis methods are inadequate for semiconductor devices with multiple power supply systems, as they fail to accurately analyze the potential difference across border cells, leading to potential gate breakdown and limited design flexibility.
Innovation Solution
An ESD analysis device and program that simulate circuit potentials across different power supply systems, extract border cells, and check ESD tolerance by calculating potential differences, allowing for more accurate analysis and relaxed ESD standards.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If existing ESD analysis methods are used for semiconductor devices with multiple power supply systems, then the analysis can be performed with simple methods, but the accuracy of ESD analysis deteriorates because potential differences across border cells are not accurately analyzed
Solution Approach 1:
The patent segments the semiconductor device into multiple power supply systems and identifies border cells at their interfaces. By dividing the analysis into system-specific potential calculations and border cell potential difference calculations, the method achieves accurate ESD analysis for complex multi-power supply devices without requiring overly complicated analysis procedures.
2Reliability
If ESD analysis is performed without considering potential differences across border cells, then the analysis process is simplified, but gate breakdown may occur due to inaccurate ESD tolerance assessment
Solution Approach 1:
The patent introduces border cells as intermediary elements between different power supply systems. By calculating the potential differences across these border cells, the method accurately assesses ESD tolerance and prevents gate breakdown. This intermediary approach maintains relative operational simplicity while ensuring reliability.
3Reliability
If ESD standards are made stringent to prevent gate breakdown, then reliability improves, but design flexibility is reduced
Solution Approach 1:
The patent changes the analysis parameter from general ESD voltage thresholds to specific potential differences across border cells. This parameter change enables more accurate assessment of actual ESD risks, allowing designers to apply appropriate ESD protection only where needed rather than uniformly stringent standards throughout the device, thereby maintaining design flexibility while ensuring reliability.
Data Source
AI summary
An ESD (Electrostatic Discharge) analysis device includes: a circuit simulation unit; a border cell extraction unit; and a check unit. The circuit simulation unit executes a circuit simulation of design data of a semiconductor integrated circuit including a plurality of circuits of a plurality of power supply systems, to calculate potentials in a plurality of current paths between pads of different two of the plurality of power supply systems, when one of an ESD current and an ESD voltage is applied between the pads. The border cell extraction unit extracts border cells from circuits of the different two of the plurality of power supply systems, wherein the circuits are included in the plurality of circuits, the border cells input and/or output signals between the circuits. The check unit checks an ESD tolerance by calculating a potential difference between the border cells, based on the calculated potentials, the extracted border cells.