ESD Artifact Reduction in Thin Film Transistor Image Sensor Arrays

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Solution Overview

Problem

Image sensor arrays are vulnerable to electrostatic discharge (ESD) during fabrication, particularly during the photolithographic patterning of interlayer dielectric into via contact holes, leading to defects and artifacts due to insufficient protection before the formation of data lines and voltage bias lines.

Innovation Solution

A conductive layer is deposited over the dielectric interlayer in the image sensor array, which spreads out charges induced by tribo-electric events, reducing the risk of localized damage to switching transistors and preventing ESD-induced artifacts during subsequent fabrication steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If guard rings and protection structures are added to protect against ESD, then reliability is improved, but device complexity increases

Engineering Contradiction:
ImproveESD protectionVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A conductive layer is deposited over the dielectric interlayer before subsequent fabrication steps to proactively protect against ESD events during photolithographic patterning and other processing steps, preventing localized charging artifacts before they can occur

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention changes the electrical properties of the structure by adding a conductive layer, transforming the insulating dielectric interlayer into a protected configuration that can dissipate electrostatic charges, thereby modifying the electrical parameter state to prevent ESD damage

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If ESD protection structures are added, then manufacturing precision is improved, but ease of manufacture deteriorates

Engineering Contradiction:
Improveartifact reductionVSAvoidfabrication simplicity
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The conductive layer is integrated into the existing fabrication process flow, combining ESD protection functionality with the standard manufacturing sequence without requiring separate dedicated protection steps, thereby maintaining ease of manufacture while improving precision

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If the array is protected during fabrication, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvefabrication robustnessVSAvoidprocess steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The conductive layer serves a dual purpose: it is part of the functional device structure and simultaneously provides self-service ESD protection during fabrication, eliminating the need for separate protection mechanisms and maintaining process simplicity

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The conductive layer effectively protects the image sensor array from ESD events, reducing the potential for defects and artifacts by distributing electrostatic charges, thus enhancing the robustness and yield of the fabrication process without adding extra process complications.

Implementation Method 1

A conductive layer is deposited over the dielectric interlayer in the image sensor array, which spreads out charges induced by tribo-electric events

Methodology Applied
Scientific EffectElectrostatic charge distribution: Electrostatics

Implementation Method 2

spreads out charges induced by tribo-electric events

Methodology Applied
Scientific EffectTribo-electric effect: Triboelectric Effect

Data Source

PatentEP2178123B1ESD induced artifact reduction design for a thin film transistor image sensor array
Publication Date: 2015.09.09 DPIX LLC
  • EP2178123B1 patent drawingFigure 1~2
  • EP2178123B1 patent drawingFigure 3
  • EP2178123B1 patent drawingFigure 4~5

AI summary

A method is provided for fabricating an image sensor array in a manner that reduces the potential for defects resulting from electrostatic discharge events during fabrication of the image sensor array. The method includes: forming at least one pixel over a substrate, the pixel including a switching transistor and a photo-sensitive cell; and forming a dielectric interlayer over the pixel. A key step in the method of the present invention is depositing a first conductive layer over the dielectric interlayer. After the first conductive layer is formed, the image sensor array is well protected from ESD events because the first conductive layer spreads out any charge induced by tribo-electric charging events that may occur during subsequent fabrication processing steps, thereby reducing the potential for localized damage to the switching transistors upon the occurrence of ESD events.