ESD Circuit Simulation with Pass/Fail Criteria
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Solution Overview
Problem
Current methods for designing input/output circuits to protect against electrostatic discharge (ESD) are time-consuming and costly, as they often require trial and error approaches and provide limited insight into critical design issues, with simulations running long and requiring manual interpretation to identify critical parameters and paths.
Innovation Solution
A simulation-based method using device models with pass/fail criteria to identify failures and critical paths in circuit designs, allowing for real-time failure detection and optimization through a numerical optimizer, enabling earlier achievement of satisfactory ESD protection levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If trial and error approach with physical testing is used to design ESD protection circuits, then design reliability is improved, but development time and cost increase significantly
Solution Approach 1:
The patent applies preliminary action by implementing ESD protection design rules and performing simulations before physical implementation. The methodology establishes design criteria upfront (e.g., transistor sizing ratios, device positioning) and uses pre-defined simulation scenarios to evaluate ESD performance before silicon fabrication, avoiding iterative physical testing and significantly reducing development time while maintaining reliability.
Solution Approach 2:
The patent replaces the mechanical/physical testing system with an automated simulation-based evaluation system. Instead of physically testing ESD protection circuits through repeated fabrication and testing cycles, the invention uses computer-based simulations with automated pass/fail criteria to evaluate design performance, thereby eliminating time-consuming physical iterations while preserving design validation quality.
2Measurement precision
If comprehensive simulation is performed to evaluate ESD protection designs, then design accuracy is improved, but simulation time increases significantly
Solution Approach 1:
The patent applies segmentation by dividing the ESD simulation evaluation into distinct, independent scenarios (e.g., HBM, CDM, ESDM models) with specific test conditions and pass/fail criteria. Each scenario evaluates particular aspects of ESD performance separately, allowing efficient parallel processing and avoiding the need for exhaustive comprehensive simulation of all possible conditions, thus reducing total simulation time while maintaining accuracy.
Solution Approach 2:
The patent employs parameter changes by implementing automated sweeping of critical design parameters (such as transistor width, length, and positioning) with defined ranges and step sizes. The simulation automatically adjusts parameters according to pre-set rules and evaluates performance against pass/fail criteria, eliminating manual parameter exploration and significantly reducing simulation time while maintaining comprehensive evaluation accuracy.
3Loss of information
If manual interpretation of simulation results is performed to identify critical parameters, then analysis depth is improved, but productivity decreases
Solution Approach 1:
The patent implements feedback by automatically comparing simulation results against pre-defined pass/fail criteria and providing immediate, structured feedback on ESD performance. The system automatically identifies failing scenarios, extracts critical parameters, and guides design modifications without requiring manual interpretation, thereby maintaining comprehensive analysis depth while dramatically increasing design iteration speed and productivity.
Solution Approach 2:
The patent applies self-service by enabling the simulation system to automatically perform tasks that traditionally required manual analysis. The automated system identifies critical failure paths, extracts design parameters needing modification, and provides actionable insights without human intervention, freeing designers to focus on high-level decisions and accelerating the overall design process while maintaining thorough analysis.
Data Source
AI summary
A method, apparatus and program product are provided for simulating a circuit. A plurality of elements of the circuit is represented by device models including pass/fail criteria. A circuit simulation program is executed on a hardware implemented processor where the circuit simulation program is configured to obtain simulation results from the device models in response to applied parameters. The circuit simulation program identifies a failure of one or more of the plurality of elements of the circuit based on the pass/fail criteria of the device models. The circuit simulation program is further configured to output the failures during simulation of the one or more of the plurality of elements that are identified in response to the applied parameters.