ESD Protection Clamp With Buried Layer Variable Doping
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Solution Overview
Problem
Conventional ESD protection devices face challenges in achieving a balance between high holding voltage and low resistance, leading to large footprints and reduced performance in meeting current capability and compliance with IC breakdown voltage requirements.
Innovation Solution
The proposed ESD protection clamp incorporates a buried layer with varying doping concentrations and stacked transistors, which modulates current flow and field distribution to achieve a high holding voltage while reducing resistance, allowing for a smaller footprint and improved latch-up immunity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ESD protection devices use uniform doping concentrations in the buried layer, then the device structure is simple and manufacturing is easier, but the device cannot achieve both high holding voltage and low resistance simultaneously, resulting in large footprint
Solution Approach 1:
The patent applies local quality by implementing a buried layer with non-uniform doping concentrations. Specifically, the buried layer has a first region with a first doping concentration and a second region with a second doping concentration that is higher than the first. This spatial variation in doping concentration allows different regions to perform different functions: one region optimized for holding voltage while another region is optimized for resistance reduction, thereby achieving both high holding voltage and low resistance in a compact footprint without requiring uniform doping throughout the entire buried layer.
2Reliability
If conventional ESD protection devices increase device size to reduce resistance, then resistance decreases, but the footprint increases and performance in meeting IC breakdown voltage requirements deteriorates
Solution Approach 1:
The patent applies parameter changes by varying the doping concentration parameter within the buried layer. The buried layer contains regions with different doping concentrations, allowing optimization of electrical properties without changing the physical dimensions of the device. By adjusting the doping concentration parameter spatially, the device achieves lower resistance while maintaining a compact footprint, eliminating the need to increase device size to reduce resistance.
3Reliability
If conventional ESD protection devices use stacked transistors with uniform doping, then manufacturing is simpler, but the device cannot achieve improved latch-up immunity and thermal management
Solution Approach 1:
The patent applies local quality in the stacked transistor structure by implementing different doping concentrations in different regions of the buried layer. The first region has a first doping concentration optimized for one transistor's performance, while the second region has a second doping concentration optimized for the other transistor's performance. This local differentiation improves latch-up immunity and thermal management by allowing each transistor to operate in its optimal doping environment, while the overall structure remains integrated and manufacturable.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution results in a reduced resistance and increased holding voltage, enabling the ESD device to effectively protect ICs with a 20-40% smaller footprint while maintaining performance criteria, including bi-directional capability and improved thermal management.
Implementation Method 1
The buried layer has a first region having a first doping concentration and a second region having a second doping concentration
Data Source
AI summary
An electrostatic discharge protection clamp includes a substrate and a first electrostatic discharge protection device over the substrate. The first electrostatic discharge protection device includes a buried layer over the substrate. The buried layer has a first region having a first doping concentration and a second region having a second doping concentration. The first doping concentration is greater than the second doping concentration. The first electrostatic discharge protection device includes a first transistor over the buried layer. The first transistor has an emitter coupled to a first cathode terminal of the electrostatic discharge protection clamp. The first electrostatic discharge protection device includes a second transistor over the buried layer. The second transistor has an emitter coupled to a first anode terminal of the electrostatic discharge protection clamp. A collector of the first transistor and a collector of the second transistor are over the first region of the buried layer.