Power-Rail ESD Clamp Circuit Using Diode String Detection
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Solution Overview
Problem
Traditional power-rail ESD protection circuits face significant challenges with high leakage current and large area requirements due to gate leakage issues in advanced CMOS technologies, limiting their effectiveness and increasing manufacturing costs.
Innovation Solution
A power-rail ESD clamp circuit design incorporating a silicon controlled rectifier and a control module with a diode string and resistor configuration, which reduces leakage current and area by using a diode string for ESD detection instead of traditional RC-based methods, and includes a conducting string to minimize current flow through the silicon controlled rectifier.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a traditional RC-based ESD detection circuit is used, then ESD protection function is achieved, but leakage current increases due to gate leakage through the capacitor transistor
Solution Approach 1:
The patent extracts and removes the capacitor component from the traditional RC-based ESD detection circuit. By eliminating the capacitor and its associated transistor (MCAP), the source of gate leakage current is completely removed, resolving the contradiction between maintaining ESD protection function and reducing leakage current.
Solution Approach 2:
The patent replaces the expensive and problematic capacitor with a simple diode string and resistor configuration. This disposable-like approach uses basic, readily available components (diodes and resistors) to achieve the same ESD detection function without the ongoing leakage issues of the capacitor.
2Reliability
If a big capacitor is used for RC ESD-transient detection, then ESD protection function is achieved, but area increases resulting in high manufacturing cost
Solution Approach 1:
The patent extracts and removes the large-area capacitor from the circuit. By eliminating this bulky component, the layout area is dramatically reduced from what would be required for a traditional RC circuit to a compact diode string configuration, directly resolving the area problem.
Solution Approach 2:
The patent replaces the area-intensive capacitor with compact diode and resistor components. This substitution uses space-efficient elements that achieve the same functional goal with minimal layout area, reducing manufacturing costs.
3Area of stationary object
If a diode string is used for ESD detection, then area is reduced, but leakage current increases from drain to gate on the transistor
Solution Approach 1:
The patent completely removes the transistor that would experience drain-to-gate leakage by eliminating the capacitor-based detection mechanism. The diode string is implemented without requiring a large switching transistor, thus extracting the source of leakage current while maintaining area efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed design achieves ultra-low standby leakage current and significantly reduces the layout area, with the power-rail ESD clamp circuit area being approximately one-sixth of traditional designs, while maintaining effective ESD performance.
Implementation Method 1
using a series of forward-connected diodes (diode string) and a resistor... When the diodes start conducing, there will be a voltage drop at the resistor R, which will turn Mn on to trigger the silicon controlled rectifier
Implementation Method 2
The silicon controlled rectifier is a better choice than a MOSFET for the main clamp device... discharge the ESD current through a safe path
Data Source
AI summary
A power-rail ESD clamp circuit with a silicon controlled rectifier and a control module is provided. The silicon controlled rectifier is connected to a high voltage level and a low voltage level for bearing a current flow. The control module is connected to the silicon controlled rectifier in parallel, and includes a PMOS, a NMOS, at least one output diode, a resistor and a conducting string. The silicon controlled rectifier is a P+ or N+ triggered silicon controlled rectifier. By employing the novel power-rail ESD clamp circuit, it is extraordinarily advantageous of reducing both a standby leakage current and layout area while implementation.