ESD Clamp Trigger Circuit Using Multiple Detection Signals
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Solution Overview
Problem
Existing ESD protection circuits for integrated circuits often face challenges in effectively managing high ESD currents and voltages, leading to potential damage due to inadequate clamp conductance and voltage differential management.
Innovation Solution
The proposed ESD protection circuit employs a detection circuit with two current mirrors generating multiple detection signals and a driver circuit with node assertion paths to produce tailored trigger signals, utilizing a boost bus and PFET transistors to enhance clamp conductance and manage voltage differentials during ESD events.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single detection signal is used to trigger the clamp circuit, then the circuit complexity is reduced, but the clamp conductance and response speed cannot be tailored, resulting in inadequate ESD protection
Solution Approach 1:
The detection circuit is segmented into multiple independent current mirrors (first current mirror and second current mirror), each generating separate detection signals. This segmentation allows each signal path to be independently optimized for different response characteristics, enabling tailored clamp conductance and response speed while maintaining effective ESD protection.
2Speed
If multiple detection signals with different speeds and drive strengths are generated, then the trigger signals can be tailored for optimal ESD response, but the driver circuit complexity increases
Solution Approach 1:
Different assertion paths within the driver circuit are designed with local quality variations - some paths use faster switching elements while others use higher drive strength elements. This allows each path to be optimized for its specific function (speed or strength) while the overall circuit maintains coordinated operation to produce tailored trigger signals.
Solution Approach 2:
The driver circuit dynamically selects and combines multiple assertion paths based on the detection signals received. During ESD events, the circuit can activate different combinations of assertion paths to dynamically adjust the trigger signal characteristics (speed and strength) according to the specific ESD condition detected.
3Reliability
If robust clamp conductance is ensured to discharge ESD currents effectively, then the voltage differential is reduced, but the circuit may consume more power during normal operation
Solution Approach 1:
The detection circuit continuously monitors for ESD conditions in advance, and the driver circuit pre-configures the appropriate assertion paths before the actual ESD discharge is needed. When an ESD event is detected, the circuit immediately activates the pre-configured high-conductance clamp path, ensuring rapid discharge capability without maintaining high power consumption during normal operation.
Solution Approach 2:
The ESD protection circuit operates in periodic cycles - during normal operation, the clamp circuit remains in a low-power standby state with minimal conduction, while during detected ESD events, the circuit switches to high-conductance mode for rapid discharge. This periodic switching between low-power and high-protection states ensures effective ESD discharge capability while minimizing overall power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces the voltage differential across the integrated circuit by ensuring robust clamp conductance and efficient discharge of ESD currents, protecting the circuitry from damage by tailoring the trigger signals' speed and strength in response to ESD events.
Implementation Method 1
An example of an ESD event that can occur with integrated circuits is where built up static charge on an external object (e.g. manufacturing equipment or a human) discharges to conductive structures (e.g. bond pads) of an integrated circuit.
Implementation Method 2
make conductive a clamp circuit to discharge the charge of the ESD event to a ground rail of the integrated circuit
Data Source
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AI summary
An ESD protection circuit includes a detection circuit for detecting an ESD event. The detection circuit includes two current mirrors each for providing two detection signals. The ESD protection circuit includes driver circuitry that produces trigger signals to clamp circuits that make conductive the clamp circuits in response to an ESD event based on the detection signals from the current mirrors.