ESD Protection Circuit with Voltage-Controlled Switch

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Solution Overview

Problem

As semiconductor technology advances, integrated circuits (ICs) are increasingly vulnerable to electrostatic discharge (ESD) due to thinner gate oxides, shorter channel lengths, and shallower source/drain junctions, leading to potential damage from high-voltage, short-duration ESD events.

Innovation Solution

An ESD protection circuit comprising a power node, an ESD detect circuit, an ESD device, and a voltage-controlled switch is implemented to detect ESD currents and control the ESD device's operation, ensuring high-performance ESD current bypassing with low power consumption by leveraging a resistor-capacitor (RC) circuit and transistors to manage the electrical connection between the ESD device and power nodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the gate oxide is made thinner and channel length is reduced to improve device integration, then device scaling and integration are enhanced, but the IC becomes more vulnerable to ESD damage

Engineering Contradiction:
Improvedevice integrationVSAvoidESD vulnerability
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an intermediary ESD protection circuit between the ESD source and the IC to protect the scaled device. The circuit includes an ESD detection unit that senses ESD events and activates protection mechanisms (such as clamp circuits or transient conductors) to shunt ESD current away from the vulnerable IC, thereby mediating the harmful interaction between ESD and scaled devices.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The ESD protection function is segmented into separate functional units: an ESD detection circuit that monitors for ESD events, and a separate protection execution mechanism (such as a clamp circuit or switchable conductor) that activates only when ESD is detected. This segmentation allows the main IC to remain scaled and integrated while the protection function is added modularly.

Inventive Principle:
Principle #1Segmentation

2Reliability

If an ESD protection circuit is added to protect IC from ESD damage, then ESD protection is improved, but power consumption increases

Engineering Contradiction:
ImproveESD protectionVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The ESD protection circuit employs periodic or event-triggered activation rather than continuous operation. The protection mechanism remains inactive during normal operation and is activated only periodically or on-demand when ESD events are detected by the sensing circuit, thereby minimizing power consumption while maintaining protection capability.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The protection function is extracted as a separate, independently controllable subsystem from the main IC operation. The ESD detection and protection activation are decoupled from normal IC functioning, allowing the protection circuit to remain dormant (low power) during normal operation and activate only when needed, thus extracting the protection function as a distinct operational mode.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If conventional ESD protection circuits are used, then ESD protection is provided, but the response time is insufficient for high-speed ESD events

Engineering Contradiction:
ImproveESD protectionVSAvoidresponse time
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The protection circuit performs preliminary preparation by pre-positioning protection elements (such as clamp circuits or switchable conductors) in a ready state before ESD events occur. The detection circuit continuously monitors for ESD conditions, and when detected, the pre-positioned protection elements can activate immediately without delay for configuration or activation, thereby achieving ultra-fast response to high-speed ESD events.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively protects ICs from ESD damage by quickly diverting ESD currents while maintaining low power consumption during normal operation, ensuring the ESD protection circuit's high performance and efficiency in bypassing ESD events.

Implementation Method 1

The voltage controlled switch is configured to couple a body of the ESD device to the second power node according to at least a voltage level of the control signal

Methodology Applied
Scientific EffectVoltage-controlled switching:

Implementation Method 2

The ESD device is coupled between the first power node and the second power node for leaking the ESD current

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 3

The ESD detect circuit is coupled between the first power node and the second power node for detecting an ESD current to output a control signal

Methodology Applied
Scientific EffectElectrical current detection:

Data Source

PatentUS10897131B2Electrostatic discharge protection circuit for bypassing an ESD current
Publication Date: 2021.01.19 UNITED MICROELECTRONICS CORP
  • US10897131B2 patent drawing
  • US10897131B2 patent drawing

AI summary

An electrostatic discharge (ESD) protection circuit has a first power node, a second power node, an ESD detect circuit, an ESD device and a voltage controlled switch. The ESD detect circuit is coupled between the first power node and the second power node for detecting an ESD current to output a control signal at a output terminal of the ESD detect circuit. The ESD device is coupled between the first power node and the second power node for leaking the ESD current. The voltage controlled switch is used to couple a body of the ESD device to the second power node according to at least a voltage level of the control signal.