ESD Protection Element With Series Diodes in Fin Structure
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Solution Overview
Problem
Conventional ESD protection devices are inadequate for FinFET and MuGFET technologies due to their high sensitivity to electrostatic discharges, requiring innovative solutions that do not rely on polysilicon gates or substrate contacts, which are not compatible with emerging process flows.
Innovation Solution
The development of an ESD protection element with diodes connected in series within a contiguous active area, formed in a silicon on insulator (SOI) or fin structure, using metal gates and silicide layers to facilitate direct electrical connections without the need for polysilicon or additional metal connections, and incorporating dummy contacts for enhanced cooling during ESD events.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional polysilicon diode stacks are used for ESD protection, then ESD protection function is provided, but compatibility with FinFET/MuGFET process flows is lost due to lack of polysilicon gates
Solution Approach 1:
The patent changes the gate material parameter from polysilicon to metal (such as tungsten, titanium nitride, or other metal gate materials), enabling compatibility with FinFET and MuGFET process flows that use metal gates instead of polysilicon. This material substitution maintains the diode stack's ESD protection function while adapting it to advanced technology nodes.
2Ease of manufacture
If diodes are formed in separate active areas, then manufacturing is simplified, but direct electrical connections cannot be achieved leading to capacitive coupling only
Solution Approach 1:
The patent merges multiple diodes into a single contiguous active area, allowing direct electrical connections between diodes through shared doped regions. This integration eliminates the need for separate active areas and intermediate connections, achieving both manufacturability and direct electrical connectivity for improved reliability.
Solution Approach 2:
The patent uses shared doped regions (such as n-type or p-type regions) as intermediaries to provide direct electrical connections between adjacent diodes. These intermediary regions serve as common terminals that electrically couple the diodes without requiring separate active areas or additional connection structures.
3Reliability
If standard diode stacks are used, then ESD protection is provided, but thermal management during ESD events is insufficient
Solution Approach 1:
The patent introduces dummy contacts as intermediary thermal management structures between the diodes and the substrate. These dummy contacts serve as additional heat dissipation pathways, conducting thermal energy away from the diode junctions during ESD events to prevent excessive temperature rise and improve thermal management.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution provides effective ESD protection for FinFET and MuGFET technologies by ensuring low ESD turn-on voltage and robustness against electrostatic discharges, while being compatible with advanced process flows and reducing the risk of diode short-circuiting.
Implementation Method 1
ESD protection devices are required which reliably dissipate the energy of an ESD pulse to ground
Implementation Method 2
using metal gates and silicide layers to facilitate direct electrical connections without the need for polysilicon or additional metal connections
Implementation Method 3
incorporating dummy contacts for enhanced cooling during ESD events
Data Source
AI summary
According to one embodiment of the present invention, an ESD protection element for use in an electrical circuit is provided, including a plurality of diodes which are connected in series with one another and which are formed in a contiguous active area, wherein the ESD protection element has a fin structure.


