ESD Protection Device With Segmented Doped Region Interfaces
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Solution Overview
Problem
The effective region of the Zener diode in ESD protection devices is easily damaged, leading to degradation of ESD protection performance and anti-surge performance, and increasing the area of the doped region results in higher parasitic capacitance.
Innovation Solution
The ESD protection device features a semiconductor substrate with a semiconductor buried layer, an epitaxial semiconductor layer, and doped regions of opposite doping types, with the first doped region forming multiple interfaces with the epitaxial layer, and optionally including sub-regions, an annular region, and a third doped region penetrating through the epitaxial layer, to enhance the effective region of the Zener diode without increasing the area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the area of the first doped region is increased to improve ESD protection performance and maximum current bearing capacity, then the effective region of the Zener diode is enhanced, but the parasitic capacitance of the ESD protection device increases
Solution Approach 1:
The first doped region is divided into multiple sub-regions arranged in an array, which increases the effective region area of the Zener diode while distributing the ESD current across multiple interfaces. This segmentation allows the effective area to be enlarged without proportionally increasing the parasitic capacitance, as the sub-regions can be optimized for lower capacitance per unit area.
Solution Approach 2:
The first doped region is configured as an annular region with inner and outer surfaces that both form interfaces with the epitaxial semiconductor layer. This annular structure utilizes two-dimensional surface area more efficiently, creating multiple interfaces (inner surface and outer surface) that increase the effective region area without requiring a simple linear increase in the overall footprint, thereby managing parasitic capacitance more effectively.
2Power
If the area of the first doped region is increased to handle larger ESD current, then the maximum current bearing capacity is improved, but the device area and parasitic capacitance increase
Solution Approach 1:
The first doped region is divided into multiple sub-regions that can be arranged in a compact array pattern. This segmentation allows the current handling capacity to be distributed across multiple smaller interfaces, increasing the total effective area for current dissipation without requiring a proportional increase in the overall device footprint, thus improving power handling while controlling device area.
Solution Approach 2:
The annular configuration of the first doped region creates both inner and outer surfaces that interface with the epitaxial layer, effectively doubling the interface area available for current dissipation within a compact radial footprint. This dimensional approach allows maximum current bearing capacity to be enhanced without a linear increase in device area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This arrangement increases the effective region of the Zener diode, preventing quick damage from ESD current and improving ESD protection performance and maximum current bearing capacity while maintaining low parasitic capacitance.
Implementation Method 1
forming an epitaxial semiconductor layer on the surface of the semiconductor substrate by epitaxial growth, wherein the epitaxial semiconductor layer covers the doped region to form a semiconductor buried layer
Data Source
AI summary
Disclosed is an ESD protection device, comprising: a semiconductor substrate; a semiconductor buried layer located in the semiconductor substrate; an epitaxial semiconductor layer located on the semiconductor substrate and comprising a first doped region and a second doped region, wherein the semiconductor substrate and the first doped region are of a first doping type, the semiconductor buried layer, the epitaxial semiconductor layer and the second doped region are of a second doping type, the first doping type and the second doping type are opposite to each other, and the first doped region forms a plurality of interfaces with the epitaxial semiconductor layer. The disclosure improves protection performance and maximum current bearing capacity without increasing parasitic capacitance of the ESD protection device.