Solid-State Devices TRIZ Cases

Pyrimidopyrimidine derivatives replace vacuum deposition with spin coating, reducing off-state leakage currents in organic thin film transistors.

Angled optical components redirect reflected light to improve luminance efficiency and reduce reflection losses in display devices.

Vacuum heat-treatment at 150°C to 300°C discharges gases from color filters, preventing pixel shrinkage during OLED manufacturing.

A three-layer electrode structure increases storage capacitance per unit area, reducing flicker and crosstalk in fringe field switching liquid crystal displays.

Back exposure photolithography creates etch-stoppers to protect oxide semiconductors from damage, reducing manufacturing costs by omitting additional masks.

Silicon caging structures constrain beam displacement perpendicular to the longitudinal axis, reducing stress and preventing breakage from mechanical shock.

A transparent protrusion on an OLED package substrate redirects incident light to increase output efficiency.

A gate electrode supports an active layer pattern to prevent interference between adjacent devices during high-density integration.

A well contact cell uses a doped tap region laterally separated from an active bridge to provide electrical biasing without disrupting semiconductor continuity.

Additive molecules occupy voids in organic semiconductors to negate charge carrier trapping effects.

Protective photoresist layer shields pixel defined layer top surface during oxygen plasma treatment to remove electrode residues.

A reflective optical cavity along the bank structure out-couples trapped light in QLED devices.

Alternating conductive and insulating layers create a 3D stack where sacrificial spacers guide self-aligned channel formation to boost integration density.

Reverse-pattern blocks in a laser mask direct separate beams to crystallize silicon thin films, eliminating shot marks from beam overlap.

Molybdenum oxide isolation buffer layers prevent copper ion diffusion to silicon thin films while maintaining low electric resistance.

An OLED array substrate uses a reflecting layer to redirect stray light, resolving the trade-off between aperture ratio and light leakage.

Vertical stacking of nested detector layers resolves spatial resolution loss and crosstalk in two-color infrared imaging.

Lateral conductive layers compensate for vertical height variations in MEMS protruding structures, ensuring uniform top surfaces and improved sensitivity.

A light-emitting device uses a partition with a depression structure to isolate adjacent pixels.

Isolation spacers divide semiconductor patterns in phase change memory contacts, overcoming photolithography resolution limits for higher integration density.

Error correction circuit generates parity data using a generation matrix to detect and correct error bits in main data.

Double buried oxide silicon-on-insulator wafers enable deeper recesses for embedded silicon germanium source-drain regions in p-type field effect transistors.

An inverted resistive random access memory structure places the electrode over the data storage layer to enable self-aligned patterning.

Segmented insulating patterns prevent Si-fence generation during patterning, improving integration density in phase-change memory devices.

Differentiated anode structures reduce current density in low-density camera areas, preventing accelerated pixel aging and ensuring uniform display quality.

A FinFET electrostatic discharge structure uses segmented doped regions and gate control to redirect excess charges away from internal circuits.

Low-refractive members with inclined surfaces redirect trapped light in electroluminescent displays, resolving waveguide mode losses.

Segmented gate lines switch conduction paths to prevent organic semiconductor degradation from repeated voltage application.

Replacing tungsten with aluminum-silicon alloy word lines reduces mechanical stress and RC delay, enabling reliable scaling of three-dimensional memory devices.

A photoluminescent layer converts ultraviolet light to visible wavelengths for silicon image sensors.

An external magnetic field generator applies a dominant DC bias to shift the transfer curve, canceling offset voltages and improving measurement accuracy.

A segmented first doped region forms multiple interfaces with an epitaxial layer to expand the effective Zener diode area.

Optical distance meters and drivers align a vapor deposition mask relative to a substrate tray, compensating for thermal drift on large substrates.

A two-side illuminated image sensor places optical sensing layers on opposite sides of a substrate to capture light directly from both directions.

A semiconductor memory design uses a buried insulating film to create a stacked gate structure that enhances gate control over the channel region.

A power interposer routes regulated signals from detached voltage regulator modules, eliminating I/O congestion on the system board.

Asymmetric angular positioning of magnetoresistive sensors maintains phase shift consistency across varying target feature sizes.

Planar magnets and coils generate electromagnetic force to adjust lens position, maintaining a small footprint for portable devices.

Multidentate organometallic ligands coordinate metal centers to enhance light emission properties in organic electroluminescent devices.

A reflective electrode OLED uses composite phosphorescent and fluorescent layers to overcome low efficiency from singlet-only emission.

A light diffusion layer positioned over apertures in a shielding film reduces contrast and color tone variations caused by RGB LED wavelength differences.

A germanium-rich phase-change alloy raises crystallization temperature to withstand automotive die soldering thermal stress.

A TFT-LCD pixel unit uses a three-mask photolithography process to merge source and drain metal layer etching with active layer patterning.

Weld high thermal expansion glass substrates via localized laser absorption, avoiding furnace heat damage to OLED devices.

A semiconductor manufacturing method removes trapped by-products from conductive patterns using a controlled out-gassing process.

A pressure sensing element integrates a sub-pressure layer to detect electrode defects without overlapping the main sensing area.

Laser irradiation creates a frangible layer that guides fracture during polishing, preventing mechanical sawing cracks.

An optical adjusting layer with varying refractive index and film thickness enhances light extraction efficiency in organic electroluminescent displays.

A protective coating film shields conductive portions from direct developer contact during photosensitive film patterning.

Segmented charge trap patterns reduce coupling capacitance between adjacent cells, stabilizing threshold voltage in dense arrays.

Nested photoelectric conversion devices with organic materials and quantum dots convert discrete-time light signals into electrical data streams.

Tungsten composite mask prevents oxide deformation during high-aspect-ratio memory hole etching, maintaining pattern integrity.

Radical oxidation forms high-density oxide in semiconductor selector patterns, preventing micro voids that degrade electrical connection reliability.

A predictive programming circuit applies program pulses to non-volatile memory cells without verifying target states.

A back side illuminated image sensor stores photo-generated charge in a potential well at the substrate back surface for readout.

Reflective light directing elements condense pixel beams to apertures, eliminating leakage without reducing aperture size.

A bidirectional Zener diode uses segmented diffusion regions to adjust terminal capacitance without altering the array pattern.

A two-dimensional grid of intersecting common electrode lines reduces resistance and stabilizes voltage distribution across the display panel.

Segmented OLED anode layers combine low work function materials with low resistivity metals to enhance electron injection efficiency.

A discharge unit with phase changeable material diverts bit line voltage to ground.

Lateral light extraction from a side-mounted LED structure achieves uniform luminance across large areas without additional optical systems.

An organic semiconductor polymer with tailored molecular structures enhances charge mobility in active layers.

Specific diamine compounds serve as host materials with 2.8 to 3.5 eV triplet energy, preventing luminescence quenching and reducing driving voltage.

A multi-junction LED structure connects column-shaped light emitting layers in parallel via a common p-type electrode.

A flexible semiconductor device uses a metal foil substrate to support insulating and semiconductor layers during high-temperature processing.

Segmented silicon nitride layers reduce charge loss and electromigration in copper interconnects by optimizing Si-H bonding.

Varying buffer opening widths segment the middle area to absorb deformation strain, preventing electrical connection failures during shape changes.

Sandwiching detection electrodes around an organic resin film prevents moisture ingress and short circuits in flexible displays.

Omitting pre-charge and verify phases in initial single-bit programming loops reduces cell damage and program time.

A memory structure employs a titanium oxynitride element with silicon and titanium oxide barriers to enhance electrical switching characteristics.

A silicon seed layer protects tungsten from oxygen radical infiltration during atomic layer deposition, maintaining electric characteristics.

Formulae A to D compounds improve hole transport and reduce electron leakage, resolving high driving voltage and low efficiency trade-offs.

Shared-material alignment marks guide nozzle deposition, resolving positioning accuracy versus display area trade-offs.

Segmented etch stop layers in a semiconductor memory device reduce punch failures and improve line arrangement density.

Dynamic gating suppresses pile-up events by blocking counts until processing completes, maintaining energy resolution and accuracy.

A doped contact region beneath the buried insulator drains minority charge carriers through conductive vias to reduce harmonic generation.

A sulfide phosphor coated with a silicon dioxide film containing metal oxide powder prevents hydrolysis and suppresses sulfur gas release under high humidity.

Replacing expensive single crystal growth with a solution-based coating method reduces fabrication costs while maintaining uniform large-area films.

An asymmetric semiconductor layer expands the channel width to reduce ON-resistance while preserving space for gate electrode formation.

Offset gate electrode openings suppress light incidence on semiconductor layers while maintaining narrow scanning line width for higher pixel aperture ratio.

A thin film transistor substrate removes the first insulating layer from the pixel area to enhance light transmittance.

Edge-connected oxide semiconductor drivers reduce parasitic resistance and capacitance, improving data retention in dense memory arrays.

Concave inter-layer insulation film expands auxiliary wiring contact area to lower resistance and voltage drop.

Light-blocking patterns segment adjacent pixels to prevent color mixing, allowing reduced separation distance for improved color accuracy.

A TFT substrate design uses asymmetric semiconductor layer positioning relative to the gate electrode to enhance aperture ratio.

Integrating color resist and touch electrodes on the packaging layer reduces photomask count and panel thickness.

A second photoelectric conversion region between the recess gate and substrate enhances photocharge transfer efficiency in image sensing devices.

Magnetic fields from coupled materials improve internal quantum efficiency by distributing current uniformly across segmented electrodes.

Vertical micro-LED layering resolves horizontal positioning limits to boost resolution while simplifying manufacturing.

A peripheral current blocking layer prevents side surface concentration, increasing light quantity while simplifying fabrication through homogenous passivation.

A recess region with a barrier layer isolates the first electrode from substrate particles to prevent short circuits in organic light-emitting displays.

Replacing epoxy resins with high refractive index glass cladding reduces optical scattering and thermal degradation, improving conversion efficiency.

Thermal reflow of a single etch mask creates multiple patterns, reducing photolithography steps and process complexity.

Microcavity structure reduces ambient light reflection without a polarizer, increasing light-outgoing efficiency.

An intermediary etching preventing member shields gate metal layers from etchant infiltration during inorganic layer removal, ensuring structural integrity.

Stacked n-type and p-type carbon nanotube transistors share a gate electrode for compact integration.

Concavo-convex patterns on OLED color filters disperse light to improve lateral brightness and reduce color shift at wide viewing angles.

A trench in the interlayer dielectric supports a planarization layer that stabilizes microlens height uniformity across the pixel region.

Insulating spacers form via mask removal and etch-back, preventing electrode collapse while enabling unobstructed insulation film deposition.

A nonvolatile memory device records information using a driver section to apply specific voltages for distinct resistance states.

Tailoring insulating layer dimensions for SLC and MLC blocks resolves the trade-off between programming endurance and data retention reliability.

Stacked transmission pads with stepped film layers enable electrical connection through conductive filler components.

A photoresist pattern masks pixel areas during light-emitting layer deposition to define precise electrode boundaries.

Intersecting trenches in a variable resistance memory device isolate heating patterns, protecting them from etchants to maintain uniform resistance.

Black color resistance layer reduces coupling capacitance between metal layers, blocking lateral light leakage to enhance display quality.

A stacked semiconductor component uses a transparent metallic layer to route electromagnetic radiation from lower active regions through upper structures.

Magnetic pole electroplating positions dispersed micro LED chips onto display substrates, resolving batch transfer complexity.

A planar transistor device uses a self-aligned dielectric zone between two independent gates to achieve precise geometry through selective oxidation.

An extinction layer between the base substrate and signal line absorbs ambient light, resolving contrast reduction caused by reflection in narrow frame designs.

A double patterning method uses ionically bonded capping layers to define minute semiconductor mask patterns with precise width control.

Epoxy-polyvinyl phenol interlayer composition resolves poor adhesion of silver nanoparticle inks while maintaining electrical conductivity.

Segmenting the charge generation layer with alkali metal buffers suppresses crosstalk and improves heat resistance in high-definition displays.

Segmenting substrate regions with isolation mandrels prevents loading effect induced thickness non-uniformity during simultaneous epitaxial growth.

A TFT array substrate uses a dual dielectric layer structure to control storage capacitor capacitance values independently from the gate.

Phosphate coating adheres to purified alkaline earth aluminate particles, then heat treatment at 500°C to 700°C prevents component elution into water.

A rectifying element employs a layered silicon nitride structure to suppress sneak currents and improve reliability in programmable logic circuits.

A carbon nanotube memory device shuttles mobile ions through a conductor to store data states.

Segmented interlayer insulating layer with distinct height portions creates flat surfaces for reliable conductor placement.

A semiconductor light emitting element uses a planarization layer to create flat bonding surfaces for interconnect structures.

Gate line detour sections bend and straddle source lines to isolate short circuit regions, preventing display defects during mechanical panel division.

Merges infrared blocking and visible light filtering into a single on-chip structure to eliminate external component space constraints.

Fluorescent encapsulation converts monochromatic light to white emission, eliminating complex multi-material mixing and reducing production costs.

A carbon-containing oxide insulating film acts as a negative-charge accumulation layer on solid-state imaging sensors.

A carbon black barrier blocks edge-emitted photons from interfering with ambient light sensors, preserving measurement accuracy.

Deep device isolation layers separate pixel regions to reduce cross talk while the buried portion structure reduces image lag.

Organic transistor design uses a semiconductor layer with distinct thickness portions to enhance mobility and on-off ratio.

An organic insulating layer extends from a display area into a non-display area to create a division region for power voltage line routing.

Selective diffusion extends p-type regions through a type-II multi-quantum well absorption layer, reducing dark current in InGaAs photodetectors.

Segmented electrode structures distribute current uniformly across parallel LED cells, reducing optical absorption losses from thick transparent layers.

Hydrophobic particles embedded in flexible organic layers block moisture and oxygen ingress while maintaining bendability for reliable OLED encapsulation.

A display device uses front and rear bonding members with distinct viscoelastic properties to absorb stress during folding.

Segmented blue and red emitters drive green lumiphors to achieve high scotopic to photopic ratio while maintaining luminous efficacy.

Voids in shallow trench isolation regions lower the effective dielectric constant to reduce parasitic capacitance and improve drive currents in bulk FinFETs.

Multi-layer high density plasma oxide films create support patterns that increase capacitance while preventing bridge defects during fabrication.

A cavity penetrating multi-layer dielectric layers enhances light penetration while thermal treatments repair plasma etch damage to reduce dark levels.

A trench in the gate electrode defines the junction between doping regions to stabilize transistor performance.

A spin-orbit-torque magnetoresistance element uses an internal assistant magnetic field to drive magnetization rotation.

Dummy patterns prevent short circuits from residues, ensuring reliable operation without increasing manufacturing complexity.

Merging nMOS and pMOS transistors into a single structure reduces the antenna effect while shrinking the ASIC area footprint by 50%.

Segmented light emitting structures with channel layers distribute electrical power, preventing current concentration and improving electrical reliability.

Graded resistivity in the drain region reduces electric field stress to suppress leakage currents and bright spots.

A free-standing silicon nitride membrane enables sub-10 micron OLED emitter patterning, eliminating light loss from color filters.