Semiconductor Diode With Segmented Insulating Patterns

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Solution Overview

Problem

Current memory devices, such as phase-change access memory (PRAM), face challenges in enhancing electrical characteristics and integration due to limitations in diode structure and insulating pattern configurations, which affect data storage efficiency and integration density.

Innovation Solution

A semiconductor device design featuring a diode with selective epitaxial growth, surrounded by insulating patterns with specific shapes and orientations, allowing for improved electrical characteristics and higher integration by preventing Si-fence generation during patterning, and enabling efficient data storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional diode structure and insulating pattern configurations are used, then manufacturing is simpler, but electrical characteristics and integration density are limited

Engineering Contradiction:
Improveelectrical characteristicsVSAvoiddiode structure and insulating pattern configurations
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The insulating pattern is divided into multiple segments: a first insulating pattern surrounding the diode and a second insulating pattern crossing the first insulating pattern. This segmentation allows each insulating pattern to perform specific functions independently, improving electrical characteristics while maintaining manageable structural complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the insulating patterns are designed with different properties - the first insulating pattern provides lateral isolation with specific width relationships, while the second insulating pattern provides crossing isolation. This local differentiation optimizes electrical performance in different spatial zones without requiring uniform complexity throughout the structure

Inventive Principle:
Principle #3Local quality

2Productivity

If higher integration is achieved, then data storage efficiency improves, but Si-fence generation occurs during patterning

Engineering Contradiction:
Improveintegration densityVSAvoidSi-fence generation
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The first insulating pattern is designed to protrude at a higher level than the upper end of the diode, creating a preliminary protective barrier before the harmful Si-fence effect can occur. This pre-positioned insulating structure prevents the generation of Si-fence during subsequent patterning processes, enabling higher integration without the harmful side effects

Inventive Principle:
Principle #9Preliminary anti-action

3Manufacturing precision

If the upper end of the diode protrudes higher than the insulating patterns, then electrical characteristics improve, but the structure becomes more complex

Engineering Contradiction:
Improveelectrical characteristicsVSAvoiddiode and insulating pattern configuration
Core Design Contradiction:
Manufacturing precisionVSShape

Solution Approach 1:

The solution moves from a two-dimensional planar configuration to a three-dimensional layered structure. The first insulating pattern is positioned at a higher level than the diode upper end, creating vertical separation. The second insulating pattern crosses the first, adding another dimensional layer. This multi-dimensional arrangement achieves superior electrical characteristics while the systematic layering keeps the overall structure organized and manufacturable

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design enhances electrical characteristics and integration density of memory devices, improving data storage efficiency and preventing Si-fence generation during the patterning process, leading to superior performance in phase-change access memory applications.

Implementation Method 1

the diode includes a semiconductor layer formed by a selective epitaxial growth (SEG) process or a solid-phase epitaxial growth process

Methodology Applied
Scientific EffectSelective epitaxial growth: Epitaxy

Implementation Method 2

the diode includes a semiconductor layer formed by a selective epitaxial growth (SEG) process or a solid-phase epitaxial growth process

Methodology Applied
Scientific EffectSolid-phase epitaxial growth: Epitaxy

Data Source

PatentUS9054296B2Semiconductor device having diode and method of forming the same
Publication Date: 2015.06.09 SAMSUNG ELECTRONICS CO LTD
  • US9054296B2 patent drawing
  • US9054296B2 patent drawing
  • US9054296B2 patent drawing

AI summary

A semiconductor device includes a conductive line, a diode on the conductive line, one or more insulating patterns adjacent to diode, and a data storage region coupled to the diode. An upper surface of the diode is between the one or more insulating patterns and the data storage region. The data storage region may include a phase-change region, and the diode may taper in width between two insulating patterns in one arrangement.