Grid Common Electrode Lines for Display Panel Voltage Uniformity
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Solution Overview
Problem
Existing array substrates with common electrode lines only in the horizontal direction result in non-uniform and unstable common voltage distribution, leading to poor display performance.
Innovation Solution
The array substrate incorporates a grid structure formed by intersecting first and second common electrode lines, coupled with transparent common electrodes through via-holes, to reduce resistance and ensure uniform voltage distribution, with the option of using metallic or transparent conductive materials and shared layers to minimize thickness and mask usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If common electrode lines are arranged only in horizontal direction, then device complexity is reduced, but voltage distribution uniformity deteriorates
Solution Approach 1:
The patent transitions from one-dimensional horizontal common electrode lines to a two-dimensional grid structure by adding vertical common electrode lines that intersect with horizontal ones. This dimensional expansion enables uniform voltage distribution across the entire display panel while maintaining manageable device complexity through systematic arrangement.
Solution Approach 2:
The common electrode line system is segmented into multiple independent lines arranged in a grid pattern, with horizontal and vertical lines interconnected through via holes. This segmentation allows each line to contribute to voltage distribution in its specific region, collectively achieving uniform voltage across the panel.
2Area of moving object
If transparent common electrode material is used, then aperture ratio is improved, but electrical resistance increases
Solution Approach 1:
The transparent common electrode is segmented and interconnected through a grid of metallic common electrode lines, creating multiple parallel conduction paths. This segmentation allows the transparent electrode to maintain high aperture ratio while the metallic lines provide low-resistance electrical pathways to ensure reliable signal transmission.
Solution Approach 2:
The patent employs a composite structure combining transparent conductive material (for the common electrode) with metallic conductive material (for the common electrode lines). This composite approach leverages the high transparency of the first material and the low resistance of the second material to simultaneously achieve high aperture ratio and reliable electrical performance.
3Reliability
If common electrode lines are made wider to reduce resistance, then electrical resistance decreases, but aperture ratio deteriorates
Solution Approach 1:
The electrical conduction function is segmented across multiple narrow common electrode lines arranged in a grid pattern, rather than relying on a single wide line. This segmentation allows each line to remain narrow (preserving aperture ratio) while the collective network of lines provides sufficient conduction capacity to maintain low overall resistance.
Solution Approach 2:
The patent transitions from one-dimensional horizontal lines to a two-dimensional grid network, increasing the total conductive path length and number of parallel conduction channels without increasing the width of individual lines. This dimensional expansion reduces overall resistance while maintaining narrow line widths that preserve aperture ratio.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces common electrode resistance, stabilizes voltage, and improves aperture ratio by allowing narrower common electrode lines and simplified connections without additional bridge wires, reducing capacitance and charging issues.
Implementation Method 1
Metallic common electrode lines (also referred as gate layer common electrode lines) may be provided in a gate metal layer and arranged in parallel with a gate line in order to reduce a resistance of a transparent common electrode and transmit a signal for the common electrode. The gate layer common electrode line is coupled with the transparent common electrode through a via-hole.
Data Source
Figure 1~2
AI summary
An array substrate and a manufacturing method thereof, a display panel and a display device are provided. The array substrate includes transparent common electrodes, multiple first common electrode lines and multiple second common electrode lines. The multiple first common electrode lines intersect with the multiple second common electrode lines to form grids. The multiple first common electrode lines are coupled with the common electrodes through first via-holes and the multiple second common electrode lines are coupled with the common electrodes through second via-holes.