Voids in STI Regions for Bulk FinFETs
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Solution Overview
Problem
The increasing down-scaling of integrated circuits leads to higher parasitic capacitance between the gate and semiconductor strips due to shallow trench isolation (STI) regions, which adversely affects the performance of FinFETs by reducing drive currents.
Innovation Solution
A novel method for forming FinFETs involves creating voids in the STI regions, specifically by using high aspect-ratio processes and adjusting process conditions to form air pockets within the STI regions, which reduces the effective dielectric constant and thereby minimizes parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If shallow trench isolation (STI) regions are used to define fins in FinFETs, then fins are properly defined and isolated, but parasitic capacitance between gate and semiconductor strips increases, reducing drive currents
Solution Approach 1:
The patent introduces voids (air pockets) within the STI regions, creating a porous structure. Air has a much lower dielectric constant than silicon oxide, so these voids reduce the effective dielectric constant of the STI region, thereby reducing parasitic capacitance between the gate and semiconductor strips while maintaining the isolation function
Solution Approach 2:
The patent changes the dielectric parameter of the STI region by introducing voids with air pockets. This modifies the effective dielectric constant from that of solid silicon oxide to a lower effective value, directly reducing parasitic capacitance and improving drive current performance
2Reliability
If voids are formed in STI regions to reduce parasitic capacitance, then drive currents improve, but manufacturing complexity increases due to high aspect-ratio processes
Solution Approach 1:
The patent performs preliminary actions by forming the voids in the STI regions before finalizing the FinFET structure. The high aspect-ratio process is executed during the STI formation stage, allowing voids to be created while the trench is being filled, rather than attempting to modify the structure later when access would be more difficult
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The formation of voids in STI regions effectively reduces parasitic capacitance, enhancing the performance of integrated circuits by improving drive currents and overall circuit speed.
Implementation Method 1
the parasitic capacitance (shown with capacitors 110) is generated between gate 108 and semiconductor strips 122, wherein STI regions 120 act as the insulator of parasitic capacitor 110
Data Source
AI summary
An integrated circuit structure includes a substrate; two insulation regions over the substrate, with one of the two insulation regions including a void therein; and a first semiconductor strip between and adjoining the two insulation regions. The first semiconductor strip includes a top portion forming a fin over top surfaces of the two insulation regions.