Inverted RRAM Electrode Structure for Self-Aligned Manufacturing
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Solution Overview
Problem
Conventional resistive random access memory (RRAM) cells face challenges with void formation and non-flat surfaces due to the bottom electrode via (BEVA) formation, leading to alignment issues and lithography limitations, which affect the performance and integration density of RRAM cells.
Innovation Solution
The RRAM structure is inverted with the electrode disposed over the data storage layer instead of under it, allowing for a self-aligning operation that improves flatness and alignment, circumventing lithography limitations and enabling better integration density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the bottom electrode via (BEVA) is formed in conventional RRAM cells, then the RRAM cell structure is completed, but void formation and non-flat surfaces occur leading to alignment issues and lithography limitations
Solution Approach 1:
The patent inverts the conventional RRAM cell structure by placing the electrode over the data storage layer instead of forming a bottom electrode via underneath it. This structural inversion eliminates the BEVA formation step that causes voids and non-flat surfaces, thereby resolving the alignment precision issues while maintaining manufacturability
2Ease of manufacture
If the bottom electrode via (BEVA) is formed in conventional RRAM cells, then the RRAM cell structure is completed, but void formation occurs leading to performance degradation
Solution Approach 1:
By inverting the RRAM cell structure to place the electrode over the data storage layer, the patent eliminates the BEVA formation process that creates voids. This structural change removes the source of reliability issues while maintaining the functional integrity of the RRAM cell
3Device complexity
If conventional lithography is used for BEVA formation, then the manufacturing process is simple, but lithography limitations prevent better integration density
Solution Approach 1:
The structural inversion eliminates the need for BEVA formation through lithography, thereby removing the lithography resolution limit as a constraint. This enables higher integration density without significantly increasing manufacturing process complexity
Solution Approach 2:
The patent extracts and removes the BEVA formation step from the manufacturing process. By eliminating this step that is constrained by lithography limitations, the patent enables higher integration density without the need for more complex lithography processes
Data Source
AI summary
The present disclosure provides a manufacturing method for the semiconductor structure, including forming a bottom metal layer including copper, forming a planar memory layer over the bottom metal layer, forming an electrode over the planar memory layer by a self-aligning operation, and defining a memory cell by patterning the planar memory layer.


