Semiconductor ESD Protection Circuit With Segmented Deep Wells
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Solution Overview
Problem
Existing electrostatic discharge protection circuits in semiconductor technology have larger parasitic capacitance values, making them unsuitable for high-speed applications.
Innovation Solution
A semiconductor structure with a diode string configuration, featuring two separated and smaller N-type deep well regions, which reduces parasitic capacitance values by forming smaller parasitic capacitors and increasing impedance, allowing for effective electrostatic discharge protection in high-speed applications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional electrostatic discharge protection circuits are used, then ESD protection function is achieved, but parasitic capacitance values become larger
Solution Approach 1:
The patent divides a single large N-type deep well region into two separated and smaller N-type deep well regions. This segmentation reduces the total area of the deep well regions, which directly reduces the parasitic capacitance values between these regions and the substrate, thereby improving high-speed application performance while maintaining ESD protection function.
2Reliability
If larger N-type deep well regions are used, then ESD protection capability is improved, but parasitic capacitance values increase
Solution Approach 1:
The patent segments the N-type deep well regions into two separated smaller regions, which reduces the overlapping area with the P-type substrate and thus reduces parasitic capacitance values while maintaining sufficient ESD protection capability through the series-connected diode string configuration.
Solution Approach 2:
The patent introduces isolation regions (P-type regions) between the N-type deep well regions and the P-type substrate. These isolation regions act as intermediaries that reduce the direct capacitance coupling, thereby reducing parasitic capacitance values while maintaining the ESD protection function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The semiconductor structure with reduced parasitic capacitance values enables efficient electrostatic discharge protection, preventing abnormal circuit operation and facilitating high-speed applications such as radio frequency technology by minimizing insertion loss.
Implementation Method 1
parasitic capacitance values of the electrostatic discharge protection circuits in some related approaches are larger
Data Source
AI summary
A semiconductor structure corresponds to a first diode and a second diode connected in series. A first well region is on a first deep well region. Two second well regions are at two sides of the first well region respectively. A first doping region and a second doping region are on the first well region. A first isolation region is between the first doping region and the second doping region. A third well region is on a second deep well region. Two fourth well regions are at two sides of the third well region respectively. A third doping region and a fourth doping region are on the third well region. A second isolation region is between the third doping region and the fourth doping region. The second doping region and third doping region are connected. The second deep well region is separated from the first deep well region.