ESD Protection Circuit with Stacked Diodes and Parallel Resistors
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Solution Overview
Problem
Conventional ESD protection circuits using diodes in high-speed circuits suffer from parasitic capacitance, which interferes with signal transmission and affects the performance of integrated circuits.
Innovation Solution
An ESD protection circuit is designed with stacked diodes and non-parasitic resistors connected in parallel, providing multiple ESD paths between a signal pad and power rails, reducing parasitic capacitance without increasing component layout, and maintaining high ESD durability even under high-frequency operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If diodes are used for ESD protection, then ESD protection ability is improved, but parasitic capacitance increases which interferes with signal transmission
Solution Approach 1:
The patent divides a single diode into multiple stacked diodes (first diode, second diode, third diode) connected in series. This segmentation reduces the parasitic capacitance of each individual diode while maintaining the overall ESD protection capability through the stacked configuration
Solution Approach 2:
The patent introduces a resistor connected in parallel with one of the stacked diodes to compensate for the increased resistance. This local modification maintains the ESD protection effectiveness while allowing the other diodes to have reduced capacitance for better signal transmission
2Object-generated harmful factors
If stacked diodes are used to reduce parasitic capacitance, then signal transmission is improved, but ESD protection ability may be reduced
Solution Approach 1:
The patent combines multiple stacked diodes with a parallel resistor to create a hybrid ESD protection structure. The stacked diodes reduce parasitic capacitance for better signal transmission, while the parallel resistor compensates for the increased resistance to maintain ESD protection effectiveness
Solution Approach 2:
The patent changes the electrical parameters of the ESD protection circuit by introducing a resistor with specific resistance value connected in parallel with one of the stacked diodes. This parameter adjustment compensates for the resistance increase from stacking while maintaining the voltage clamping capability for ESD protection
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively decreases parasitic capacitance, improving ESD durability and signal transmission performance by allowing efficient current conduction and reducing signal loss in high-speed circuits.
Implementation Method 1
When an electrostatic pulse is incurred, the diode is triggered and conducted to discharge the ESD current
Implementation Method 2
it may generate parasitic capacitance due to its P-N junction structure
Data Source
AI summary
An electrostatic discharge (ESD) protection circuit for providing ESD paths between a signal pad and a first or second power rail includes a first ESD protection module and a second ESD protection module. The first ESD protection module is coupled between the signal pad and the first power rail, and includes at least two first diodes and a first resistor. The first diodes are stacked with each other, and one of the first diodes is electrically connected with the first resistor in parallel. The second ESD protection module is coupled between the signal pad and the second power rail, and includes at least two second diodes and a second resistor. The second diodes are stacked with each other, and one of the second diodes is electrically connected with the second resistor in parallel. The signal pad is coupled between the stacked first diodes and the stacked second diodes.