Tunable ESD Transistor Gate Width for Multi-Voltage Protection
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Solution Overview
Problem
Existing electronic devices face challenges in providing effective electrostatic discharge (ESD) protection, particularly in scenarios where multiple protected circuits operate at different voltages, requiring multiple ESD protection devices with different designs, which increases manufacturing complexity and cost.
Innovation Solution
The development of an ESD transistor with an adjustable trigger voltage by modifying the gate width, allowing a common ESD transistor design to be used across various operating voltages, and the integration of multiple ESD circuits with different gate widths to bypass protected circuits effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple different ESD protection devices are used for protected circuits operating at different voltages, then each circuit receives appropriate ESD protection, but the device complexity and manufacturing steps increase
Solution Approach 1:
The patent implements a universal ESD protection device design where a single ESD protection circuit can protect multiple protected circuits operating at different voltages. The ESD protection device includes a trigger circuit coupled to multiple protected circuits, allowing one device to perform multiple protection functions across different voltage domains, thereby reducing the total number of ESD protection devices needed while maintaining appropriate protection for each circuit
2Reliability
If multiple different ESD protection devices are used for different voltage ranges, then each protected circuit has optimized protection, but the manufacturing cost and complexity increase
Solution Approach 1:
The patent creates a universal ESD protection device that can be manufactured using a single standardized process while protecting circuits at multiple voltage levels. The trigger circuit is designed with multiple output terminals that can be coupled to protected circuits operating at different voltages, eliminating the need for separate manufacturing processes for different voltage-rated protection devices
3Ease of manufacture
If a single ESD protection device design is used for all voltage ranges, then manufacturing is simplified, but the protection may not be optimized for specific voltage requirements
Solution Approach 1:
The patent implements local quality by allowing the trigger circuit to have different trigger voltage levels at different output terminals while using a single unified device structure. Each output terminal can be configured with appropriate trigger characteristics for its specific protected circuit, enabling voltage-optimized protection within a universal device design that maintains manufacturing simplicity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables rapid ESD protection with high current capacity and simplifies manufacturing by using a single ESD transistor design for multiple voltage ranges, reducing the need for multiple protection devices and manufacturing steps.
Implementation Method 1
an ESD circuit configured to discharge an electrostatic discharge (ESD) to a ground such that the ESD bypasses the protected circuit
Data Source
AI summary
Electronic devices and methods of producing such electronic devices are provided. In an exemplary embodiment, a method of producing an electronic device includes forming a protected circuit and an ESD circuit, where the ESD circuit is configured to discharge an electrostatic discharge (ESD) to a ground such that the ESD bypasses the protected circuit. An ESD transistor is formed in the ESD circuit, where the ESD transistor includes a source and a drain. The ESD transistor also includes a gate with a gate width perpendicular to a gate length, where the gate length is measured across the gate from the source to the drain. A trigger voltage of the ESD transistor is set by adjusting the gate width.