ESD Device Zener Region Doping for Voltage Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing electrostatic discharge (ESD) devices with large capacitance values have slow response speeds and limited control over clamp voltage during ESD events, which can lead to circuit damage.

Innovation Solution

An ESD device with a Zener region having a higher dopant concentration than the semiconductor layer, overlapping with the semiconductor substrate, and a unique doping structure that includes separate conductivity-type regions with blocking structures, allowing for improved breakdown voltage control and reduced capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If alternative ESD devices use a Zener diode and P-N junction diode structure with acute breakdown voltage features, then breakdown voltage control is improved, but capacitance becomes low which limits response time

Engineering Contradiction:
Improvebreakdown voltage controlVSAvoidresponse time
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent applies local quality by creating distinct regions with different doping concentrations within the semiconductor structure. Specifically, it forms a first doped region with a first doping concentration and a second doped region with a second doping concentration that is higher than the first. This local variation in doping concentration allows different parts of the device to have optimized characteristics - the first region contributes to breakdown voltage control while the second region with higher doping provides lower capacitance and faster response time.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If ESD devices have relatively large capacitance values, then they can handle higher energy, but response speed becomes slow and control over clamp voltage is limited

Engineering Contradiction:
Improvecapacitance valueVSAvoidresponse speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The patent applies parameter changes by systematically varying the doping concentration parameter across different regions of the semiconductor device. The first doped region has a first doping concentration while the second doped region has a second doping concentration that is explicitly stated to be higher. This parameter variation allows the device to achieve an optimized balance between capacitance and response speed, avoiding the trade-off present in conventional designs where large capacitance necessarily implies slow response.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If ESD devices are designed with conventional doping structures, then manufacturing is simpler, but control over clamp voltage during ESD events is limited

Engineering Contradiction:
Improvedoping structure simplicityVSAvoidclamp voltage control
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

The patent implements local quality through its multi-region doping structure where different regions have specifically tailored doping concentrations. The first doped region with lower doping concentration and the second doped region with higher doping concentration each serve specific functions in controlling the ESD behavior and clamp voltage characteristics. This localized optimization of doping quality provides superior clamp voltage control compared to conventional uniform doping structures.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The ESD device effectively controls clamp voltage during both positive and negative ESD events, providing faster response times and enhanced protection against electrostatic discharges while minimizing capacitance, thus preventing circuit damage.

Implementation Method 1

a second conductivity-type Zener region having a higher dopant concentration than the semiconductor layer, and overlapping on the semiconductor layer and the semiconductor substrate

Methodology Applied
Scientific EffectZener breakdown: Avalanche Breakdown

Implementation Method 2

Some alternative ESD devices disclose structures wherein the ESD devices protect against effects of an ESD by employing a Zener diode and a P-N junction diode

Methodology Applied
Scientific EffectP-N junction rectification: Diode

Data Source

PatentUS10263123B2Electrostatic discharge device and method of fabricating the same
Publication Date: 2019.04.16 MAGNACHIP SEMICON LTD
  • US10263123B2 patent drawing
  • US10263123B2 patent drawing
  • US10263123B2 patent drawing

AI summary

Provided are an electrostatic discharge (ESD) device and method of fabricating the same where the ESD device is configured to prevent electrostatic discharge which can be a cause to product failure. More particularly, the ESD device provided includes a Zener diode and a plurality of PN diodes by improving the architecture of an area wherein a Zener diode is configured compared to alternatives, to provide improved functionality when protecting against ESD events.