Ethernet Clock Synchronization via PTP Packet Distribution
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing Ethernet-based local networks face challenges in synchronous data transmission, particularly in military applications requiring synchronized links and dynamic connection matrixing without disrupting other connections, with existing solutions like adaptive methods and SyncE facing issues in buffer dimensioning and latency.
Innovation Solution
A communications system that transports time reference information as data packets through the network for periodic synchronization of intermediate devices, eliminating the need for buffer storage and allowing quick connection establishment and dynamic matrix changes, using off-the-shelf clock generators and the Precision Time Protocol (PTP) for clock synchronization with residual jitter less than 50 nanoseconds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If adaptive methods with buffer memories are used for synchronization, then data transmission can be maintained, but buffer dimensioning becomes difficult and data loss occurs during overload or starvation
Solution Approach 1:
The patent extracts the synchronization function from the data transmission path by using a separate reference clock signal that travels independently through the network. This separates the timing reference from the data stream, eliminating the need for complex buffer management while maintaining reliable synchronous transmission.
Solution Approach 2:
The reference clock signal acts as an intermediary that mediates synchronization between transmitting and receiving devices. Instead of using buffers to manage timing differences, the patent introduces a dedicated clock signal that both devices use to synchronize their operations, eliminating buffer dimensioning problems.
2Reliability
If adaptive methods with buffer memories are used, then data can be resynchronized, but processing delays are generated
Solution Approach 1:
The patent applies preliminary action by pre-synchronizing devices using the reference clock signal before data transmission begins. The clock signal establishes the timing reference in advance, eliminating the need for post-capture buffer processing and reducing delays to minimal network propagation time.
3Reliability
If SyncE technology is used for synchronization, then clock signal propagation is achieved, but specific switches are absolutely necessary
Solution Approach 1:
The patent makes standard Ethernet switches universal by enabling them to handle both data traffic and reference clock signals through existing IEEE 1588 PTP protocol support. This eliminates the need for specialized SyncE switches while maintaining reliable clock propagation across the network.
4Reliability
If NTP protocol is used for clock synchronization, then clock synchronization is achieved, but transport and processing latency exceeds 50 nanoseconds jitter requirement
Solution Approach 1:
The patent replaces the software-based NTP protocol with a hardware-level reference clock signal distribution system. By using dedicated clock signal paths and hardware timestamping at the network interface level, the system achieves synchronization with jitter under 50 nanoseconds, eliminating the latency inherent in software processing.
5Productivity
If connections are established in a non-synchronized network, then data transmission can begin, but synchronization acquisition takes time
Solution Approach 1:
The patent implements preliminary synchronization by distributing the reference clock signal continuously across the network before data transmission begins. This allows devices to be pre-synchronized and ready for immediate data transfer, eliminating synchronization acquisition delays while maintaining fast connection establishment.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
The system (20) has a reference clock generator (30) for periodically transmitting and distributing time reference information in a form of data transport packets to intermediate equipments (22) via a physical Ethernetaccess interface. Each intermediate equipment comprises a local clock generator, where the information is received and processed by each intermediate equipment so as to bring the local clock generator on the reference clock. A signal processing unit is clocked by the local clock generator so as to perform synchronous processing of the transmitted signals. The signal processing unit is formed of digitizing unit, processing unit, formatting or deformatting unit, sequencing unit, network access unit and data linking unit.